I'm looking at the NodeMCU "auto-program" circuit but could not understand why it is there at all.

NodeMCU auto-program circuit

From my point of view, this circuit enables open-collector outputs, but makes programming dependent on the time between switching the DTR and RTS pins being smaller than the ESP goes from reset to sampling the GPIO0 level.

Another reason I could imagine was to avoid invalid startup/connection resets, but I can't see why proper pulling couldn't fix this.

Is there any reasoning I couldn't see from my analysis? Why isn't DTR/CTS connected directly with one transistor on each line? Why controlling each line directly (and thus allowing to switch GPIO0 low before resetting without glitches) wouldn't be better?

EDIT: while the question is about the same structure shown in Is this a flip-flop?, I understand it's function and know it's not a flip-flop (no need to redraw it). What I'd like to do is know why was it chosen instead of a much simpler open collector configuration like the one below, specially since this one doesn't generate a glitch in the transition between the two programming states (from reset to/from GPIO0=0).

Open collector DTR/RTS


Again, yet another cute way of drawing the schematic. (See: Is this a flip-flop? for another cute way.) And once again, a less-cute drawing would look like:


simulate this circuit – Schematic created using CircuitLab

The RTS line needs to pull down (be LO) on its emitter in order to have an impact on nRST. The DTR line needs to pull down (be LO) on its emitter in order to have an impact on GPIO0. Either way, the nRST and GPIO0 results are open-collector outputs, so they actively pull down (if active at all) but will need some kind of passive pull-up (often found inside the MCU) in order to have a definite output voltage in all cases.

If both DTR and RTS are pulled LO (or HI) then neither GPIO0 or nRST are actively pulled down. So DTR and RTS must be oppositely engaged in order for either (one or the other, but not both) output to be actively pulled down.

An advantage here is that the external controlling device can choose to set both DTR and RTS to LO in order to decouple itself from the target device's I/O lines. (Setting them both to HI could lead to a problem where there is conduction via the base-collector diode.) This frees up the I/O lines on the target device for other circuitry to be added for target device purposes not related to being reset.

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    \$\begingroup\$ I've edited the question to make it clear I want to know the difference from that circuit to a simpler open collector configuration. Please do not mark it as duplicate, since the subject is different from the mentioned question. \$\endgroup\$ – Ronan Paixão Jan 18 '18 at 1:07
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    \$\begingroup\$ @RonanPaixão I see your newly added schematic. Perhaps this is a lesson in spending the time needed to write a better question at the outset. Regardless, the difference should be quite obvious. Your newly added schematic approach would interfere with the available options for a designer. Your pull-up resistors, for example, cannot be disabled and would very much limit other possible uses of the I/O pins. More could be said, but that should be enough and quite obvious. The first circuit (not your added one) is much better for the purposes at hand. \$\endgroup\$ – jonk Jan 18 '18 at 1:36
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    \$\begingroup\$ I really don't get the difference, since the first circuit also needs pull-ups (they just don't show up in this image because they are farther on the NodeMCU schematic). But from the circuit one can guess (or actually read the NodeMCU schematics) that NRST and GPIO0 won't ever be high except for added pull-ups or other external circuitry. Also, if the designer chooses disableable pulls, the same can be done for the second circuit. The only difference in interference is that the first circuit won't allow interference in both pins at once, but it will allow interference one at a time. \$\endgroup\$ – Ronan Paixão Jan 18 '18 at 2:14
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    \$\begingroup\$ I have edited again just to make it clear in the second picture that the external pull-ups are external to the core of the circuit, even if the NodeMCU schematic includes them, Perhaps this is a lesson in understanding that people will pick a detail and take your question out of context, even if the context was provided (in this case the NodeMCU board, which also has external resistors). \$\endgroup\$ – Ronan Paixão Jan 18 '18 at 15:16
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    \$\begingroup\$ @D.Patrick The answer itself was made prior to OP modification and wasn't at all dismissive (only I can tell you what was in my mind at the time.) But I'll take the hit on the comments, since that's what I think you are focused on. It's fine. Thanks for taking the time to make your point. \$\endgroup\$ – jonk Dec 11 '18 at 20:43

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