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I have a process-monitoring system which is sensitive to RFI, specifically in the 412-419MHz range. It has not been tested for sensitivity to 2.4GHz, but I've measured a WiFi signal level of -66dBm at the device in question while it was operating with no issues. The transmitter I'm concerned about has a max output of 1.25mW EIRP at 2.42-2.45GHz.

How do I determine how close I can let the transmitter get to the RFI-sensitive device without exceeding the existing signal level in that location?

I've tried reading into some wireless range and power loss calculations, but this isn't my strong suit and I'm not getting very far. I'm not necessary looking for just a distance, but the process to determine it.

Edit: Considering the unknowns in this situation, I understand that it's not feasible to get a precise value for distance for this particular device. However, the discussion below gives me a bit of a ballpark to go on and I expect that I'll be heading towards some testing to confirm. If any useful information arises at that time, I can incorporate it into this question, but I'll consider it closed for the time being.

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  • \$\begingroup\$ Without actually knowing how much power in the 2.4 GHz band your sensitive device can take, you have no real way of doing any calculations. \$\endgroup\$ – Joren Vaes Jan 18 '18 at 17:57
  • \$\begingroup\$ Wouldn't it be easier to simply move the transmitter around to find the distances at which it causes issues? Seems like you'd have to do that to verify your calculations anyway. \$\endgroup\$ – vofa Jan 18 '18 at 18:17
  • \$\begingroup\$ I agree and ideally I would do just that (which is what they did with the ~400MHz radios prior). However I was more curious about the mathematical side of things. I think that the final confirmation, in this case, has to come from a controlled test like you mentioned. \$\endgroup\$ – Luc Jan 18 '18 at 20:35
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It's probably best to consider a thing called link-loss i.e. how much received power you get at a distance from an antenna that is pushing out X amount of power. So, what you are trying to avoid is a power greater than -66 dBm being received from an emitter that is pushing out 1.25 mW EIRP at some distance away.

Starting with the 1.25 mW EIRP, this is about 1 dBm.

This means your link loss is 67 dB and in free-space the formula is: -

Link loss (dB) = 32.5 + 20\$log_{10}\$(f) + 20\$log_{10}\$(d)

Where f is in MHz and d is in kilometres. This equation tells you how many dB of power loss you can expect at a given distance with a given carrier frequency.

67 dB = 32.5 dB + 67.8 dB (2.45 GHZ) + 20\$log_{10}\$(d)

Rearranging, 20\$log_{10}\$(d) = -33.3 dB or distance is 0.022 km or 22 metres.

Bear in mind that in free space, radio travels less hindered than in a factory or on earth so, in many respects, this is a cautious result. However, I know nothing about the measurement device receive antenna nor do I know if the -66 dBm was measured at the time that the WiFi was kicking out maximum power so some caution is needed.

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    \$\begingroup\$ Does EIRP not already take into account antenna gain? \$\endgroup\$ – Joren Vaes Jan 18 '18 at 18:26
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    \$\begingroup\$ @JorenVaes yes you are right, I shall make amends. \$\endgroup\$ – Andy aka Jan 18 '18 at 18:29
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Although I am sure there are mathematical ways to determine this in reality there are so many variables that affect the equations it becomes an impossible task.

When working in the RF band simple things like trace lengths, bends in traces, badly positioned vias, component orientation etc. can all effect how much cross-talk can reach other circuits. Even if the PCB is designed for optimum performance, once you put it in an enclosure or add wiring all those equations chance.

As such there is therefore no minimum distance that would be applicable to all applications.

It is normal to design such systems to try to isolate the noise-makers from the other circuits. Appropriate use of isolated ground islands and shielding to limit the cross-talk is the norm.

For a system like you have described where you know you have a high frequency source it is prudent to take that into account in the design of the lower frequency sections. Adding additional filtering to signals to specifically block the higher frequencies would not be unusual.

Ultimately, you really have to accept that this is a design issue that must be analysed as part of the development cycle. It should be planned into the schedule that more than one PCB design cycle may be required and will include RF testing and optimization.

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    \$\begingroup\$ +1... The first sentence says it all. I have some EMC experience (not much, I'm no kind of expert) but I've learned that it is a "step back and consider everything all at once" sort of challenge. I don't leave the house these days without a roll of self-adhesive copper tape. :) \$\endgroup\$ – Wossname Jan 18 '18 at 21:16
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I've rescued a number of projects brought to me, after FCC susceptibility testing failed. Key is dampening resistors in long CMOS leads, no hanging sections of GND plane (perferrably a single sheet of foil, with no long slits and just tiny via holes.

However you have an existing system. I'd place absorptive dipoles (discrete leaded resistors, each lead ~~ wavelength/4) around the vulnerable system. With dipoles being 75 ohms, you can use that resistor value as starting point. Wavelength is 1meter * 300/2400 = 1meter/8 = 12.5cm. Wavelength/4 is 3cm or 1.25 inches. Thus standard discrete 75 ohm resistors, used inmass, perhaps taped to cardboard around the system. Or get absorptive foam.

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