In a paper about radiation hard FPGAs I came across this sentence:
"Another concern regarding Virtex devices is half latches. Half latches are sometimes used within these devices for internal constants, as this is more efficient than using logic".
I have never heard about an FPGA device primitive called a "half latch". As far as I understand, it sounds like a hidden mechanism to "source" a constant '0' or '1' in the backend tools... Can anyone explain what exactly a "half latch" is, especially in the context of FPGAs, and how they can be used to save logic?
EDIT: The paper were I found this was A Comparison of Radiation-Hard and Radiation-Tolerant FPGAs for Space Applications