# How to scale output of butterfly unit radix 2 for further stages?

I am designing 8 point FFT by radix 2 using verilog. I am using radix 2 butterfly unit with 8 bits input and so output. I expect to be 8 bit so that I can use this structure again and again for further sta. I am applying DIT. If I consider my twiddle factors are of 8 bits stored somewhere then I multiply to one of butterfly inputs result is 16 bits, and when added/subtracted to other input output is for sure going to be min 16 bit/ 17 bit. But I expect my output to be of 8 bit so that same butterfly with 8 bit input can be used. How do I scale this without loss of accuracy

      module butter_fly(xr,xi,yr,yi,wr,wi,xxr,xxi,yyr,yyi);

input[7:0] xr,xi,yr,yi,wr,wi;
output[7:0] xxr,xxi,yyr,yyi;

wire[7:0] xxr,xxi,yyr,yyi;
wire [7:0] xr,xi,yr,yi,wr,wi;   // wr and wi represents twiddle factor
wire[15:0] w1,w2,w3,w4;

assign    w2 = yi*wi;
assign    w3 = yr*wi;
assign    w4 = wr*yi;
assign    w1 = yr*wr;

assign  xxr = xr + w1 - w2 ;
assign  xxi = xi + w3 + w4;
assign  yyr = xr - w1 + w2;
assign  yyi = xi - w3 - w4;
endmodule


I am exceeding these 8 bits in my ouput. since these output will become input to my next stage. the next stage also consists of radix 2. This obtained output I can not feed into it. It has to be 8 bits. So how do i scale this output of butterfly so that it can become 8 bit type input to next stage butterfly unit. I expect my final output to be correct at last.

let me know if you do not understand

• This looks vaguely familiar... – Brian Drummond Jan 28 '18 at 15:51
• left hand expression is 16 bits and right hand side is 8 bits,for sure it will produce error in output. whaT SHOULD I DO AT INPUT OR OUTPUT SO THAT I CAN STORE MY RESULT CORRECT – P.Rathee Jan 28 '18 at 16:09

Obviously if you multiply two 8-bit numbers and then want the result to fit in 8 bits you will loose some precision.

You need to make a decision regarding how much error you are willing to accumulate in each stage. If you are not willing to have any error then you will need to increase the number of bits in each stage.

When doing fixed point arithmetic like this its often useful to interpret the vectors as scaled integers. For signed numbers you could use the following scale...

1000_0000... = -1.00...
0000_0000... = 0.00...
0111_1111... = 0.99...

The multiplication of two N-bit signed vectors results in a vector that is 2*N - 1 bits long. When using scaled integers you would then just take the upper N bits of the result to get back to your original scale.

• thankyou, your answer seem to be convincing. can you please elaborate more on this scaled integers or if provide me reference link for these scaling integers. I am not handful on scaling of numbers – P.Rathee Jan 28 '18 at 16:37