During ESD testing, pulses of both positive and negative polarity are used. So polarity matters very little. But the charge reservoir used for ESD testing is only 100pF (or 200pF depending on the model). That is too small to cause much of a voltage change on a 100uF cap. Basically it is a 1,000,000 : 1 voltage divider. So 10kV discharge will only cause 10mV voltage change on the cap.
If V1 is actually an audio output DAC, then V1 might get damaged. But now we need to consider if the electrolytic cap can actually be modeled as a cap when it comes to an ESD pulse. There may be substantial parasitic inductance, so it may even help protect V1 for all I know. It all gets messy. That is why people tend to just slap down an ESD diode and move on.
Series resistors and ferrites also help attenuate the ESD pulse, and are seldom, if ever damaged by the pulse. So my philosophy has always been to put resistors or ferrites close to the ingress point of the ESD pulse, and put shunt protection close to the IC or transistor being protected. The more series elements you put between incoming pulse and silicon, the better. For signals with no high frequency content, a simple RC filter may provide great protection from ESD.
Getting back to your circuit. If you wanted to, you could move R2 closer to "OUT," and put a small ESD diode (TVS diode) in shunt between R2 and C1. This would be to protect V1. Since you haven't told us what V1 is, I don't know whether it needs protection or not.
When trying to filter high frequencies, we tend to look at ferrite beads. But a 10k SMT resistor has higher impedance from DC to microwave than any ferrite bead, and they are cheaper, too.