I have a design using PCIe 4 lanes that interface between 2 CCAs and will be connected through a connector/flex connection. In the event that the mate to either CCA is not available, I want to know how I can verify the signals to the connector of each CCA and then, if there is a loopback that I could use to test one CCA if the other isn't available. One CCA will have an ASIC/PCIe and the other will have a ZyncSoc/PCIe.


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    \$\begingroup\$ Could you please define CCA. \$\endgroup\$ – Tom Carpenter Jan 30 '18 at 17:00
  • \$\begingroup\$ I don't believe that PCIe has support for loopback testing (i.e. connecting TX to RX of same device). PCIe requires a root and an endpoint (or multiple endpoints), and a device can't be both root and EP. \$\endgroup\$ – Tom Carpenter Jan 30 '18 at 17:02
  • \$\begingroup\$ @TomCarpenter: Many PCIe devices do support physical and logical loopback, but only if you have access to a number of very hidden registers. \$\endgroup\$ – Peter Smith Jan 30 '18 at 17:15
  • \$\begingroup\$ JTAG Boundary scan? If this is only for testing on production line. \$\endgroup\$ – Some Hardware Guy Jan 30 '18 at 17:21

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