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I am implementing a power storage system. The voltage of the storage device must be sensed in order to direct current to and from the storage device.

The storage device voltage will vary between 0 and 60 volts, and the system's current will be up to 60 A. The micro-controller operates at 3.3 V.

To map 0 to 60 volts onto 0 to 3.3 volts: 60 V x 10 kΩ / (10 kΩ + 170 kΩ) = 3.33 volts

The current through the resistors is 0.333 mA. (Corrected from original 3.33)

Would this work as expected. Is there something I am neglecting?

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    \$\begingroup\$ Wondering why this got a down vote..... sigh \$\endgroup\$ – Trevor_G Jan 31 '18 at 14:52
  • \$\begingroup\$ hmm question? 57V*3.33mA = Pd max Choose part - 25% margin = how hot ? \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Jan 31 '18 at 15:05
  • \$\begingroup\$ @TonyStewart.EEsince'75 3.33 is an error, its actually 0.33mA \$\endgroup\$ – Trevor_G Jan 31 '18 at 15:07
  • \$\begingroup\$ Will there be sense voltage applied before Vdd to uC? \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Jan 31 '18 at 15:09
  • \$\begingroup\$ I would use a Caddock 100 Megohm and a 5 Megohm .025% resistor divider and a CA3140T op-amp as a buffer to drive the ADC. Yes, the Caddock parts are expensive. \$\endgroup\$ – user105652 Feb 1 '18 at 0:13
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Your system will work but there are a few of things you need to be mindful of.

  1. You are dividing the 60V to the max that the micro can handle. This means if the storage device is ever over 60V you will be presenting too high a voltage to the micro and your ADC will not be able to detect it. You would be better to use something like 10/190 so you present 3V at 60V so you can allow 10% overshoot on the 60V. The numbers also are easier to work with.

  2. As WhatRoughBeast pointed out, the divider will always drain some current from the source, be that only about 333uA. You may want to consider adding some form of switching circuit so you only attach the divider to the 60V when required.

  3. If you are using 1% resistors, the possible measurement error through the divider is +-2%. That may or may not be a problem for your application, however it is a problem if you use 10/170 since +2% will make the presented voltage over the magic 3.3V.

  4. Most micros these days have the option to use a stable internal voltage reference for the ADC instead of the rail voltage. If yours does (you did not specify the micro) you should scale the divider to use that level instead, again with that 10% overhead. That will remove errors caused by whatever the 3.3V supply is doing and get you more temperature stability.

  5. Adding some small capacitance to the division point will also help make the system less sensitive to noise, both ambient, and on the 60V rail. There is a balance here though, do not make it too large or your sample time needs to extend to cope with the slower step response time.

  6. You should also consider splitting the top resistor to make it two in series. This will provide you with a little extra isolation from the 60V, split the power dissipated, and remove the potential of a single fault short in the resistor blowing up the micro. A little extra protection would not hurt either.

  7. Finally, this design is high impedance. That means it is affected by the input impedance of the ADC. Using a voltage follower buffer between the divider and the ADC is prudent.

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    \$\begingroup\$ Do not forget that resistors are not ideal. Which is why you often find multiple in series for higher voltage rating, or higher resistance to reduce current (thus power). \$\endgroup\$ – Jeroen3 Jan 31 '18 at 14:59
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One thing you ought to be aware of is the possibility that the MCU will not power down correctly if on its own 3.3 volt supply whilst the potential divider is still producing a peak voltage of (say) 3 volts - current may be passed through the IO pin to Vcc pin and keep the MCU powered. It can happen and the way around this is to choose an op-amp buffer on the same rail as the MCU. You have to choose a rail-to-rail op-amp that can have an input voltage a few volts greater than its rail voltage (3.3 volts).

You should also consider that if your IO pin connects to an ADC it will have offset and gain errors that might mean you cannot detect the low-end or the high-end voltages in the range hence, you should slightly bias the potential divider junction to avoid 0 volts and choose an attenuation factor that avoids running to close to the 3.3 volt nominal upper limit for ADC measurements.

With the resistors mentioned you might fall-foul of not providing a low enough impedance to correctly and accurately drive the ADC input. This is usually solved with a capacitor from ADC input to 0 volts and this capacitor might also prevent spikes damaging the ADC.

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Define "works as expected".

Yes, assuming the micro-controller has a very high input impedance, 60 volts will map to 3.3 volts using a 10k/170k voltage divider.

The current through the divider will be 0.333 mA, not 3.33.

Of course, the voltage divider will continue to draw current even when there is no energy available to replenish the battery. 0.333 mA may not seem like much, but it will drain the storage device 24/7.

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  • \$\begingroup\$ What is the consequence of increasing the resistances in order to reduce current draw? Is the micro-controller's input impedance an issue? I am working with Texas Instruments' C2000 series. \$\endgroup\$ – rur2641 Jan 31 '18 at 13:53
  • \$\begingroup\$ Increasing the resistances reduces current draw while increasing the effect of controller input impedance. The input impedance is in parallel with the 10k resistor, effectively reducing the input voltage. Whether or not this is a problem depends on the controller and your accuracy requirements. I've never worked with the C2000 and am too lazy to investigate. \$\endgroup\$ – WhatRoughBeast Jan 31 '18 at 19:34

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