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I am currently designing a circuit involving several 7400 TTL series ICs that include SSI ans MSI chips, so I may need to include several decoupling capacitors for the circuit design.

Documentation for decoupling capacitors for a group of 7400 series chips is difficult to find, so I don't have a good idea for how many chips should share a 0.1uF ceramic capacitor.

I need to know how many SSI, MSI and LSI chips of the (THT) 7400 series should share a single capacitor. How should I place the capacitors for them to be most effective? Would the CMOS 4000 series share the same properties?

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    \$\begingroup\$ The golden rule is one .1 uF cap per IC. TTL is noisy and slowly going obsolete. If possible the 74HCxx series is much better, much less power consumed, much higher drive current. \$\endgroup\$ – Sparky256 Feb 2 '18 at 1:09
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    \$\begingroup\$ Bypass capacitors must be physically close (like 5-10mm) and route directly to the power and ground pins of the device. If too far away, or if the traces are long (and thus inductive) the benefits are lost. The idea is to make as small a loop area as possible. \$\endgroup\$ – MarkU Feb 2 '18 at 1:41
  • \$\begingroup\$ One 0.1uF per IC, and something like 100uF per board. \$\endgroup\$ – Brian Drummond Feb 2 '18 at 11:00
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You can just group the 7400 series with the 74LS00 and 74S00 series. They are all TTL circuits with 74S00 being the fastest, but also heavy current consumption. Those IC's were upgraded to 74F00 (F means FAST) in the late 1980's which could be clocked at 120 MHZ (74F190 counters). Still they were TTL as far as transistion from high to low on inputs and outputs.

They were all 5 volt logic and maximum motherboard speed was about 50 MHZ for several years.

It was common practice to install a .1 uF capacitor as close to the ground and Vcc pins as possible, as they made a lot of noise due to their totem-pole outputs.

As the 1980's came along the CMOS CD4000 series came to market with a working voltage of 3 to 12 volts. In some cases they could take 15 volts on Vcc. They were created with battery powered devices in mind, consuming only 3 uA at 3 volts with no clock, or a stopped clock. They still exist today for the most commonly used versions such as the CD4013 flip-flop and CD4066 quad analog switch.

In every case engineers played it safe and installed .01 uF capacitors for the CD4000 series and a short hop to a larger 10 uF capacitor, as the CD4000 series did not cause large current spikes when changing states.

Along comes late 1990's and suddenly we have 3.3 volt logic that is CMOS, yet the manufactures suggest using .1 uF capacitors at the IC body. Then major changes all related to faster speeds. 1.35 volt common returns and PECL logic made from CMOS suddenly upped speeds 100 times. Now we had GHZ CPU's, and still the need today even for using .1 uF capacitors. For analog circuits an additional 4.7 uF and sometimes 10 ohm to 33 ohm resistors on the Vcc pin for extra quiet performance.

Todays motherboards may have hundreds of .1 uF capacitors, especially to AC couple the 1.35 volt return bus for GHZ logic and the CPU's.

7400 series or not, don't skimp on such crucial and cheap parts that help all but guarantee a working and quiet board. Use the .1 uF on ALL Vcc and Vee pins, at the IC body if possible.

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Older recommendation SN54/74xx was for 10n every 2-3 chips, plus some lossy tantalums to damp ringing. For the latter you can use ceramic caps (eg. 10uF) with a couple ohms in series. Modern small MLCC caps- you can use 100n every chip if you like.

Keep them close to the chip power pins and the conductors short and wide as possible. Minimize the loop area (inclusive of the cap and power pins) as much as possible. A resistor such as 33R in series with long clock lines (at the driven end) can reduce ringing.

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"7400" might be the original 10 nanosecond Trise/Tfall slow bipolar family.

Or you might be handed "Equlvalent" modern-process ICs with much faster edges.

Build up the circuit, use a scope to examine the edges and the VDD/RTN upsets and the horrid trash on what will become clean Trise/Tfall, after you place 0.1uF caps UNDER each IC from pin 7 to 14 or from pin 8 to pin 16.

Pick lossy crap-dielectric caps, for the dampening benefit of high ESR.

Are you using a PCB? or Augat wire-wrap board? or what?

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  • \$\begingroup\$ Out of curiosity, what can be considered a crap-dielectric? \$\endgroup\$ – Wesley Lee Feb 2 '18 at 3:42

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