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FPGAs contain logic resources and routing resources to link them together. I think that, for a given number of logic blocks being used, there would be a % of routing resources being used that link them. Is is possible to know what % of routing resources we are using?

I have heard that sometimes a design may not fit in an FPGA due to limitation of routing resources rather than logic resources. I have also heard that, in rare instances, the FPGA may get physically damaged due to some routing paths getting too hot during device operation. Maybe someone can confirm if this is true.

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For Altera/Intel (Quartus II), the best information you will be able to get is from the compilation report.

If you open the report of the fitter step (in the tasks window, expand "Fitter", then double click "View Report").

The report contains information about the resource usage of the design, which includes a global routing average under "Resource Selection -> Resource Usage Summary", and then a breakdown of the full routing resource utilisation under "Resource Selection -> Logic and Routing Selection -> Routing Usage Summary". Those will show you the % of routing resources used by the design.

Additionally if you constrain your design in a LogicLock region (you can create them in the Chip Planner), you can get view statistics on the LogicLock region which include resource and routing utilisation.

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  • \$\begingroup\$ Thanks Tom. There is a section "Routing Usage Summary" in the Fitter report. Although at this time I am not sure what each row means in detail e.g C12 interconnects, C2 interconnects, C4 interconnects e.t.c; is there a general rule of thumb of % routing resource vs % logic resource used like a ratio (if we oversimplify it). There won't be a clear cut answer but is there such a concept? \$\endgroup\$ – quantum231 Feb 3 '18 at 21:52
  • \$\begingroup\$ @quantum231 under the "Resource Usage Summary", it should have at the very bottom a global routing usage %. You could compare that with the overall logic usage %. But you probably won't find any correlation. \$\endgroup\$ – Tom Carpenter Feb 3 '18 at 22:23
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    \$\begingroup\$ Some designs use lots of routing, but little logic. Others use lots of logic but little routing. \$\endgroup\$ – Tom Carpenter Feb 3 '18 at 22:25

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