# Having trouble understanding CMOS and PMOS circuits [closed]

I'm in a digital logic class and I've got a solid grasp on Boolean algebra, SOP, POS, NAND, NOR gates, etc. Now I'm having trouble in understanding what NMOS, PMOS and CMOS transistors are and how they're used. I've read the textbook for my class and I'm just completely lost.

Could someone give me an explanation about them, how they're used and how to draw them (schematic symbol)? One example that was mentioned in class was something along the lines of having a CMOS circuit implemented with NMOS and PMOS transistors or something.

## closed as too broad by Bimpelrekkie, RoyC, Sparky256, Voltage Spike, TonyMFeb 8 '18 at 12:05

Please edit the question to limit it to a specific problem with enough detail to identify an adequate answer. Avoid asking multiple distinct questions at once. See the How to Ask page for help clarifying this question. If this question can be reworded to fit the rules in the help center, please edit the question.

• Wht was wrong with your attention in class? – Tony Stewart Sunnyskyguy EE75 Feb 3 '18 at 21:10
• Could someone give me an explanation That's not going to happen here as that explanation would not be any different from what is in your textbook. If you want an answer here you have to ask a much more specific question and also show that you have tried to find an answer yourself. And "completely lost" isn't an excuse, it just makes you look you're not putting in the effort needed. – Bimpelrekkie Feb 3 '18 at 21:53
• I've read the textbook and how to draw them means that you are using the wrong textbook – jsotola Feb 4 '18 at 2:42
• what is preventing you from talking to your instructor? – jsotola Feb 4 '18 at 2:43
• Welcome to EE.SE. I suggest you read all you can until it hurts. It is the concepts you must learn. The rest is academic. – Sparky256 Feb 5 '18 at 1:23

## 1 Answer

Basically there are 2 types of MOSFETs

• NMOS

• PMOS

That refers to how the Transistors are constructed. NMOS are low-side-switches, and therefore become conductive when VCC is applied. PMOS on the other hand are high side switches and become conductive when a low voltage is applied.

Normally to implement logic gates you need a pull-up / down resistor. Referring to the transistors used those technologies are called PMOS / NMOS.

In contrast CMOS stands for complimentary MOS. It is a combination of P and N channel MOSFETs. Basically you add a PMOS on the high side and a NMOS on the low side and connect the gates. Therefore low input voltage means high output and vice versa.

This is shown in the following figure.

The benefit of cmos architecture is that it consumes less power as current is only flowing when the circuit is switching.