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I read paper,about gate voltage boost,recently,and i found the output is not almost the straight line,the more gate voltage boost circuit is in series, the more pronounced the output is tilted ,as the second picture shown

enter image description here

enter image description here

Because it use the precharge and discharge of capacitor (\$C_{B1} \$,\$C_{B2}\$...\$C_{BN}\$) to boost every stage output voltage,so is it,the precharge and discharge of capacitor,the reason why the more gate voltage boost circuit is in series, the more pronounced the output is tilted?

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  • \$\begingroup\$ When a single stage is "tilted", naturally all others add up \$\endgroup\$
    – PlasmaHH
    Commented Feb 4, 2018 at 12:27
  • \$\begingroup\$ then why will the first stage output tilt? \$\endgroup\$
    – Shine Sun
    Commented Feb 4, 2018 at 12:29

1 Answer 1

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Weak FET Conduction (leakage) resistance may cause some exponential decay. Thus rising edge charge pump is higher by 370~372mV and falling edge is less after each stage. Each stage adds near the same amount to the previous.

Speculation

Increasing the clock rate will reduce the slope but at some point will reduce the step rise due to C ratios and Conduction ratios.

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  • \$\begingroup\$ well,so you think the reason maybe the mos conduction resistance,not the precharge/discharge of the capacitor? \$\endgroup\$
    – Shine Sun
    Commented Feb 4, 2018 at 14:08
  • \$\begingroup\$ Even an ideal capacitor will decay \$\endgroup\$
    – D.A.S.
    Commented Feb 4, 2018 at 14:25

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