Newbie here, our professor had given us a big problem (i mean homework) on how to interface multiple SPIs using 1 microcontroller. But his requirements are quite exaggerated:

1 microcontroller interfaced on 90 spi devices (like what?!) and it should be simplified like use only 3-8 gpio pins to access all of those.

He said submit it on a paper considering 1 microcontroller has 2 SPI buses. Well, i did take the challenge since this will be done in a demultiplexing way (right? since ss pins of SPI devices just needed some active LOW/HIGH signal even it is not directly coming from the microcontroller like let's say signal from a voltage supply/regulator output to wake it up).

Now canvasing to choose multiplexers, 3 to 8, 4 to 16 bit, 5 to 32 (cascaded) i find myself seeing this 10-bit I/O expander ICs where upon reading and looking how it will be used, it's like a bit shifter using SPI only. I plan to use these 10 I/O ports as 10 cs for the 10 SPI device's ss. I thought of this will be good. Then seeing decoder, etc.. i find using multiple 10-bit I/O expander to connect to this 90 spi devices because i think making a combinations/cascadings, etc w/ these 4 different ICs, i guess its good to stick using multiple 1 IC only maybe to reduce cost and complexity.

Do i understand it right, specially these 4 different ICs? what exactly their difference and application? Am i facing a problem if i do this kind of approach??

  • \$\begingroup\$ is "bit shifter" a shift register? \$\endgroup\$ Feb 9, 2018 at 1:36
  • \$\begingroup\$ Thanks Harry for the reply :D yes like 74HC595 \$\endgroup\$
    – Mheruian
    Feb 9, 2018 at 1:41
  • \$\begingroup\$ I think your question can be simplified some. SPI is complex enough and would include much of what you ask. \$\endgroup\$
    – user105652
    Feb 9, 2018 at 6:44

1 Answer 1


SPI normally only needs 4 wires for serial communications. CLK and CS are output, as is DO. DI is your only input. So look into the 74HC154 x3 for the outputs (1 of 16 can be low, or an inverted data output), and a 74150 for the input(1 of 16 inputs can be active). If 74150 is not available you can use a CD4051 which selects 1 of 8 input. Use 4 MPU pins for initial 1 of 16 input selection.

You can see where you can use some of the MPU pins to expand on the 16 SPI ports you now have. If you expanded them by using 4 more address bits using a 74HC154 as a address decoder, now you can drive up to 256 SPI ports.

Seeing as how you only need 90, you don't buy or draw what you don't need. Also the CD4051 only gives you 8 inputs, so the less IC's the better.

So you used 4 pins for the main SPI port, 4 more pins to expand out to 16 ports, and 4 more pins for 256 port, or just 3 pins for 128 ports.

Just to clarify part descriptions, the 74HC154 is 1 of 16 decoder, using 4 select lines to select 1 of 16 outputs. The 74C150 is a 16 to 1 encoder, using 4 select lines to select 1 0f 16 inputs. The CD4051 is an 8 to 1 encoder (bi-directional), using 3 select lines to choose 1 of 8 inputs.

There is no register needed, as the MPU can latch any I/O pin, which is what a register does-it 'holds' data or control data to define if a port is an input or output. The 7 or 8 address lines are decoded to select 1 of 90 SPI ports.

EDIT: Because of the common drive pins, a 74AC541 buffer can be used to boost the CLK and DO lines for parallel connections. The DI for each SPI port can be connected to a series of 8 input NOR or NAND gates to sum them together. This leaves only the CS pin which has to be multiplexed out to 90 CS pins on the 90 ports. At some places data inverters may be needed.

This is an absurd exercise as it is not rational to expand SPI to such a great extent.

I would draw this for you, but it would take many pages of basically duplicating the same thing. That is at the heart of multiplexing / de-multiplexing.

  • 1
    \$\begingroup\$ I don't visualize your architecture very well, but you don't seem to take advantage of the chip select. \$\endgroup\$
    – dim
    Feb 10, 2018 at 4:23
  • \$\begingroup\$ Use of the cs is mandatory for expamsion \$\endgroup\$
    – user105652
    Feb 10, 2018 at 4:25
  • \$\begingroup\$ I simply did not draw it out. I am on my cellphone right now. \$\endgroup\$
    – user105652
    Feb 10, 2018 at 4:26
  • 1
    \$\begingroup\$ Then, if you use CS, why do you multiplex CLK, DI and DO? Just daisy-chain them, as usual. Anyway, I probably just did not understabd your scheme... \$\endgroup\$
    – dim
    Feb 10, 2018 at 7:23
  • \$\begingroup\$ If you think about it, it is an absurd thing to do. No one irl would expand an SPI port to 90 ports. The drawings alone would be many pages. Impossible in hardware. Goodnight. \$\endgroup\$
    – user105652
    Feb 10, 2018 at 7:30

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