Why am I getting ramping-up voltage at the output of the given circuit below? I should be getting saw-tooth waves right. What am I missing?
Output waveforms are like these in LTSpice!
Did I chose a wrong value or set wrong transition period?
Initially the voltage across the capacitor is 0V.
During the 20ms 3V pulse the voltage across the capacitor is close to 3V. Hence a current of 3/200e3 A will flow into the capacitor and charge it a bit. Voltage across the capacitor rises a bit.
During the remaining 80ms 0V pulse the voltage across the capacitor is rather small. Therefore only a very small current will flow out of the capacitor and discharge it. This discharge is smaller than what you put into the capacitor during the charge phase. The voltage across the capacitor drops, but just a tiny bit.
Therefore over time the voltage slowly rises and you get your staircase pattern. It's more zig-zag really.
If you don't put a limit on the number of pulses and let the simulation run again you'll see that the voltage averages out at roughly 660mV.
This is the low-pass filtered result of your 20% duty cycled square wave. Note that ideally the voltage should be 600mV. The 10% difference come from the non zero rise- and fall time of your square wave.
The timeconstant of the RC filter is about RC = 2.2 seconds, your simulation time is less than that so you can never see a full charge/discharge cycle.
The pulses repeat every 0.1 s that's 22 times faster than the RC timeconstant. The Capacitor doesn't get the time to fully charge/discharge.
What you see now is the capacitor trying to charge to the average value of the input signal. After a long time it will reach that and then you will see a small amplitude, distorted triangle wave across the capacitor.
Either adjust the timeconstant of the RC filter or slow down the pulses and simulation time.