# LTspice gives wrong AC analysis

I have multiple issues with LTspice. Take this trivial example:

XU1 N002 N001 vcc 0 N001 N003 ADA4807
V1 vcc 0 5
V2 N002 0 PULSE(0 1 0 0 0 0.5m 1m) AC 1
R1 N003 vcc 1k
C1 out 0 1p
R2 out N001 1
;tran 2m
.ac dec 1 100 1000Meg
.backanno
.end


tran works fine:

But ac gives me bogus results - like -47 dB "gain":

• What happens if you bias the input near mid-supply instead of at the negative rail? Are you sure the ADI library is all correct for LTSpice syntax (as opposed to PSpice, HSpice, ...)? – The Photon Feb 9 '18 at 20:14
• The AC source goes above and below ground, but U1 only has a positive supply. Try giving U1 a split supply or adding a DC offset of Vcc/2 to the AC source. – vofa Feb 9 '18 at 20:14
• @vofa, the AC analysis is totally linearized, so if the circuit has gain at Vin = 0, the AC sim will show that gain. And ADA4807 is spec'ed for input CM below the negative rail...but maybe the simulation model is funky in that operating range? – The Photon Feb 9 '18 at 20:16
• The output is not linear within some saturation voltage from Supply rail shown in "tran" as around 40mV so what will the small signal analysis say if you bias the output into the linear range? Does the output go below ground too? j/k – Tony Stewart Sunnyskyguy EE75 Feb 9 '18 at 20:18
• @vofa That would be true for ANYONE else. But Mike at Linear works very hard to make absolutely certain that Linear's own opamps work in LTspice well. There's even proprietary code added to it for still better results than normal. If it is a Linear Tech part and the model is included with LTspice, it's going to work. – jonk Feb 9 '18 at 20:23

As mentioned by just about everyone in the comments, your op amp doesn't work because your DC bias point is 0V and the op amp will only work for inputs between its rails (0V and 5V).

Your options are either: 1) Use positive and negative op amp rails, or 2) Bias the input AC voltage to between the two rails, e.g. 2.5VDC.

As seen below, with the DC bias point set at 0, I get similar broken behavior (although its a bit different since I used a different op amp)

If I add a 2.5V DC offset to the AC input, I get the expected behavior:

EDIT: See also The Photon's answer describing why the minimum output voltage limits you in this case.

• Does the behavior change at all if you add 1 milliohm ESR to V1 and V2? – vofa Feb 9 '18 at 20:22
• You said "the op amp will only work for inputs between its rails (0V and 5V)" but this is not true for ADA4807. This part has allowed input common mode at 0.2 V below the negative rail (or above the positive rail). – The Photon Feb 9 '18 at 20:27
• @The Photon The datasheet uses the qualifier "−VS ≤ VICM ≤ +VS − 1.5 V" for all specs. That is, your common mode input must be between the negative rail and 1.5V below the positive rail. The "Absolute Max ratings" table says that the VICM can be 0.2V beyond the supply voltages, but this is just a survival limit - it does not guarantee that it will WORK at those voltages, just that it won't be damaged. – Selvek Feb 9 '18 at 20:30
• @Selvek, the line I'm referring to is the input common mode range line in the specifications, not the input voltage line in the maximum ratings. Performance might not meet the other specs with inputs outside the rails, but it should still act as an amplifier. In the Theory of Operation section it also says "The ADA4807-1/ADA4807-2/ADA4807-4 input operates 200 mV beyond either rail." – The Photon Feb 9 '18 at 20:35
• @The Photon Oh ok didn't see that. But operating in a region of the chip with unspecified performance is still a bad idea, and it's very likely the model accuracy will break down at those extremes. – Selvek Feb 9 '18 at 20:39

The ADA4807 input range includes the negative and positive rails. In fact it allows input 0.2 V beyond either rail.

Further, in the Theory of Operation section the datasheet says,

Specifications like input bias current, offset voltage, etc., might not be maintained with the input biased at the negative rail, but in general this op-amp should still act like an op-amp in that condition.

However, the minimum output voltage is 0.1 V above the negative rail. You'll also notice that the minimum output voltage in your transient simulation was about +0.1 V.

Therefore a follower configuration cannot maintain negative feedback when the input is at or below the rail, and the op-amp will be saturated at this bias point.

In saturation, very low AC gain is expected, and this is reflected in your AC simulation result.

If you arrange to have a negative supply available, or bias the input at least 0.1 V above the negative rail, you should see a gain of 1 for this circuit.

For AC analysis, LTSpice constructs a linear (small signal) model of your circuit considering the DC operating point [*]. Datasheet of the device ADA4807 says that this is a rail to rail input/output opamp, though the LTSpice model doesn't seem to agree with it. Especially the ground rail, transient output could not go below about 0.07V however it reaches 1V perfectly. Based on this, for the opamp model that cannot amplify at ground DC level, the AC simulation seems fine (i.e. in accordance with the transient output).

To resolve, you may add a DC bias to your AC signal source via its DC voltage property (should be at the upper right corner of the properties window of signal source V2).

A better and widely useful way of supplying such biasing conditions is as follows: You may AC couple your input signal via a large (1GF) capacitor, and provide your DC bias (like Vcc/2) via a large (1GH) inductor, as shown in the below figure:

simulate this circuit – Schematic created using CircuitLab

[*] LTSpice uses DC operating point analysis to obtain those DC voltages at all nodes. In your circuit, AC analysis sees 0V-DC at the + input of the opamp since no other DC bias is applied, which supposedly prevents amplification.