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Specifically the MAX 10 FPGAs are being looked at. The IO banks are powered through their own power pins. I've already know that the bank 1 and 8 need to be powered up with the core so that the configuration can be loaded.

The question is, for all the other banks, bank 2 to 7, is it safe to power them up and down separately? By separately it also means at random times that the logic will determine based on its internal design.

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I've already know that the bank 1 and 8 need to be powered up with the core

Under these circumstances FPGA exits power-on-reset and starts configuring, see here page 2-26. But it is a good question if it will function properly in user mode.

The question is, for all the other banks, bank 2 to 7, is it safe to power them up and down separately?

There were a number of questions related to shutting down I/O voltages, for example this one, there's even Altera's answer to related question for Stratix IV FPGA.

However, for MAX 10, if you would look at page 6 of the datasheet for MAX 10 family, you will see in the footer

(2) VCCIO for all I/O banks must be powered up during user mode because VCCIO I/O banks are used for the ADC and I/O functionalities

Thus in general if you do not use I/O pins, there will be tiny power saving from powering down their respective VCCIO, however you risk to catch issue when this power is used for something else inside the chip.

The best, from my point of view, is to follow manufacturer's guidelines. Or you can file a support incident with them, but I bet they will refer you to the documentation and will not seriously spend a minute on this incident.

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Quote from the stratix link:

Yes, you can power down the VCCIO voltage of unused I/O banks in Stratix® IV devices. The Stratix IV device Power-On Reset (POR) circuitry does not monitor the VCCIO of the I/O banks, thus you do not need to power up the VCCIO on banks which are not using any I/O pins.

Altera® does not characterize device operation when the VCCIO voltages are not within recommended operating ranges. There is minimal power savings when powering down the VCCIO voltages, and thus Altera recommends powering all VCCIO pins to a recommended operating voltage.

Because non-characterized, it is not safe.

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