Determine order in which the 3 inputs go high

Question

Specs

Three input signals: A, B, C that are all low upon reset

Only one signal goes high at a time. Once a signal is high, it remains high until reset

Output the order in which the three signals arrived. You can encode this output however you prefer

Sort of a phase comparator, but with 3 inputs

My attempt

Create a moore FSM with 10 states: idle, a,b,c,ab,ac, ba, bc, ca, cb. The terminating 6 states each correspond to one of the 6 possible outputs.

I feel this is overkill for something as simple. Does any one have a more elegant approach to tackle this problem? A smaller fsm maybe? Your suggestion could be completely orthogonal to mine as long as it is simpler.

Answer 1

Dave suggests using six D-latches (four gates each), but you only really need six gates total, or seven if you want to detect when all input are high.

A NAND SR-latch will remember its state when both inputs are high. When both inputs are low, both outputs are high. This lets us detect that the output isn't stable.

If you don't need to detect if the order of inputs is known already, it also suffices to take just one output from each pair. If you want to know when all inputs are high, add an extra three-input gate in parallel to the latches.

Answer 2

An asynchronous FSM is one logical way to approach this, but I think it would be easier (in terms of design effort) to simply employ six latches.

The latches are arranged in three pairs, in which each input signal latches the states of the other two signals at the time that it goes high. From these six variables, its a simple combinatorial problem to decode the six possible outcomes. Start by decoding the latch outputs in each pair to determine whether the enable sginal went high first (both latches low), second (one latch or the other is low) or third (both latches high).

^{simulate this circuit – Schematic created using CircuitLab}

Answer 3

Your answer is slightly more complex than needed

only three bits of state are needed, two to encode the first high, and another bit to encode which of the other two was the second high.

in other words the states a,b,c can each be merged with one of the terminal states.

state.  INPUT  result state

  0      010     1
  0      100     2
  0      011     3
  1      110     4
  2      101     5
 any     000     0

all other inputs, keep current state.

Answer 4

I'd do it this way...

Simulator