# How to derive this formula from this schematic?

This is the voltage multiplier from the paper ,it said the rectiﬁed output voltage is given by

$V_{out_i}$= $V_{out_{i-1}}$ +$2(V_A-V_{ON})$,$V_A$ is the AC voltage amplitude at the input;$V_{ON}$ is the voltage drop by the native NMOS transistor.

I don't know how does the author derive this formula from the schematic,can anyone teach me how to derive this?Please explain more specific,for example,when NMOS turn on/off,the bottom side voltage of first $C_M$ is ?V,and why does $(V_A-V_{ON})$,not $(V_A+V_{ON})$

• You can probably use conservation of energy considerations to answer the second more specific question. – user16324 Feb 11 '18 at 14:09
• @BrianDrummond I don't know what do you mean. – Shine Sun Feb 11 '18 at 14:10

## 1 Answer

Study this picture of a diode clamp: -

As you can see an AC square wave is converted to a mainly positive square wave by use of a diode. The resistor is very high in value and prevents the output rising positively too high but can be ignored.

Given that you have a stage of rectification using a similar "diode" there are two diode drops to consider so, instead of 2V-Vo as per the picture you will have 2(V-Vo).

Returning to the basic clamper circuit, the diode could in fact be connected to a DC voltage source of Vx volts and then you should be able to see how the formula in your question relates.

Instead of diodes MOSFETs are used but they achieve the same thing.