0
\$\begingroup\$

The circuit below is the timing logic for the SC280 UV exposure unit. Based on my judgement the design of the circuit is poor - and I'm planning to replace it -, I'm posting my question only to learn something more about 555 timer circuits and debugging similar issues in the future.

schematic

simulate this circuit – Schematic created using CircuitLab

The 555 is an NE555P, the UV exposure time is set with the R1 potmeter from 0 to 5½ minutes, and the exposure is started with the SW1 switch. The reason I checked the circuit is that the timer was inaccurate, the actual on-time was considerably less than the preset one (by up to a minute). As you can see the DISCHARGE and CONTROL pins are unconnected, even though they should be connected to C2 and to ground via a capacitor respectively according to the 555 monostable circuit on Wikipedia.

My question is how C2 discharges after the timer expires and if that way conforms to specification. Based on my measurement after pressing SW1 until the preset time expires it charges up to 10V (= ⅔ * 15V), then it drops suddenly to about 1V and then discharges slowly towards 0V. I suppose this was the circuit designer's intention, but it still surprised me, given that the discharge pin is unconnected and that (as I imagined, but also based on the datasheet) both the TRIGGER and THRESHOLD pins should be high impedance inputs. After building this same circuit on breadboard, I measured the discharge current (up to 400μA) to be via the THRESHOLD pin, while I didn't measure any considerable current via the TRIGGER pin. Looking at the 555 internals this pin is connected to the base of a BJT (which in turn is part of the threshold comparator).

Does the above discharge current go via the BJT's base-emitter junction? Normally (when the 555 is permanently powered via its Vcc pin) the THRESHOLD pin doesn't draw any considerable amount of current even if the timer has expired, so I doubt that this high discharge current would be due to normal BJT BE current to keep the transistor open. Maybe it's via the BC junction, due to Vcc falling below the voltage level on the THRESHOLD pin?

Is there any problem in THRESHOLD and TRIGGER being above Vcc? At least according to this NE555 datasheet they shouldn't be above it.

Why would someone choose this design over the more obvious (and correct?) one where Vcc is always connected to 15V and C2 is discharged via the DISCHARGE pin?

\$\endgroup\$
  • \$\begingroup\$ That's a semi-crazy system. What do you actually require for your UVLAMP enable? Does it use 15 V to say "ON"? How much current compliance does it require, if so? What exactly does this "enable" need to do for the lamp? (I don't care at all about the existing circuit, since you don't either. So tell me about what you need to achieve with your UV lamp device.) I know. Different question. But I think you are barking up the wrong tree and I'd like to know what your lamp actually needs. Not what this circuit provides. \$\endgroup\$ – jonk Feb 11 '18 at 23:41
  • \$\begingroup\$ I'd like a more accurate timing, which would be possible with a faster discharge of the C2 cap, probably by connecting it to the DISCHARGE pin somehow. The enable signal just drives another relay, which switches the current for the lamps. But yes, my question here was really how the discharge of C2 happens in the above circuit and if it is out of spec due to having >Vcc voltage on the THRESHOLD and TRIGGER pins. \$\endgroup\$ – Imre Deák Feb 12 '18 at 0:44
  • \$\begingroup\$ I have an idea that is a lot simpler. But I need to know the details of what's being driven. What voltage it requires to turn on, etc. \$\endgroup\$ – jonk Feb 12 '18 at 0:52
  • \$\begingroup\$ Thanks but I don't want to change that part of the design, just want an enable signal that is more accurate. Also here I only wanted to better understand what's going on with the current circuit, the proposed solution is just a bonus for me. \$\endgroup\$ – Imre Deák Feb 12 '18 at 12:32
1
\$\begingroup\$

First I must say... YUCK.

When you close the switch it powers the 555 which in turn drives its output high, pulling in the relay to keep itself powered when you let go the button.

After the timeout the relay is released.

As you have discovered there is no actual discharge path for the capacitor. In reality what will happen is the capacitor will discharge through the power pin of the 555. Mostly through the three resistors that setup the reference levels, plus whatever quiescent current the 555 still draws with that voltage division.

enter image description here

That of course will result in a decay time longer than your set on-time. So the next time you trigger the circuit the delay will be significantly less if the cap has not had time to reach zero volts.

You can correct that a little by adding a low resistance discharge path, D2 and R3 down through the relay coil as shown below. I included D3 so the inductance of relay coil current does not pull a negative charge on the cap. Note: Using the discharge pin may not work, since the 555 is unpowered, the state of the discharge transistor is undefined.

schematic

simulate this circuit – Schematic created using CircuitLab

You will still have a slight variation on second firing due to the diode drops though. Using shotky diodes would help, but watch out for the leakage currents on those.

\$\endgroup\$
  • \$\begingroup\$ Thanks, I haven't thought about the discharge via Vcc. (The 3 resistors there are 16k.) Your proposed solution \$\endgroup\$ – Imre Deák Feb 12 '18 at 12:20
  • \$\begingroup\$ Thanks, I haven't thought about the discharge via Vcc. (The 3 resistors there are 16k.) Your proposed solution reduces the discharge time considerably, the C2 voltage dropping down to 40mV shortly after the timer expiration. From there it climbs back 400mV for some reason and discharges again towards 0V. I wonder if it's because TRIGGER is also falling below 1/3*Vcc starting another charging cycle inadvertently. But that's a problem on it's own and the original question is answered now. \$\endgroup\$ – Imre Deák Feb 12 '18 at 12:28
  • \$\begingroup\$ @ImreDeák since that line also goes to the lamp enable circuit which you have not shown, that may back-feed too if it has a significant pull-up. It might be prudent to add a diode and pull-down resistor to that line. \$\endgroup\$ – Trevor_G Feb 12 '18 at 15:09
  • 1
    \$\begingroup\$ There is nothing connected to the output in my test, it's just the above circuit on a breadboard.Looks like the reason for the 40mV->400mV jump is the diode's voltage drop and as you also hinted it could be further improved using a Shottky there. One more note:in the original circuit the discharge current's amount and direction is influenced by the R1 potmeter. At 1Mohm the discharge via the Vcc pin is very slow, up to 5uA. There is still the bigger up to 400uA burst via the threshold pin, but all-in-all this is the worst situation when resetting to the initial state is the slowest. \$\endgroup\$ – Imre Deák Feb 12 '18 at 19:13
0
\$\begingroup\$

My question is how C2 discharges after the timer expires and if that way conforms to specification.

In an ideal world it wouldn't, but capacitors got parasitic resistance in parallel with them, draining them. FYI: When you were measuring with whatever tool you were using, then you added another path for the current to flow => drained the capacitor even faster.

Specification... what specification? .. Doesn't matter which one I suppose, I wouldn't recommend depending on parasitic resistances that vary greatly from capacitor to capacitor, and depending on the input resistance of the internal op-amp.

I measured the discharge current (up to 400μA) to be via the THRESHOLD pin

Well the Threshold pin hooks up to an op-amp inside of the NE555, the op-amp is probably based off BJT's which has lower input impedance than CMOS based. So 400 µA is not impossible.

Is there any problem in THRESHOLD and TRIGGER being above Vcc? At least according to this NE555 datasheet they shouldn't be above it.

The datasheet is like the ten amendments or something along those lines. If the datasheet says so, then it is so. Going against the datasheet is like driving a car on the wrong side of the road. It might work for a while, but it is more probably that a failure will occur sooner than later.

Why would someone choose this design over the more obvious (and correct?) one where Vcc is always connected to 15V and C2 is discharged via the DISCHARGE pin?

The schematic in your question uses 0 current when it's off. Zero, zippo, nada. The "more obvious (and correct?)" solution uses around 300 µA all the time. Even when you are not using it.

Maybe the person who designed the schematic didn't know about the more obvious monostable 555. I don't think you did, because you used the person's schematic instead of the more obvious solution.


When the voltage across C2 is above 1 V, then it is being discharged through it's parasitic parallel resistance and the threshold pin. After the 1 V it is being discharged only through the parasitic parallel resistance.

\$\endgroup\$
  • \$\begingroup\$ The leakage current of the C2 cap if left alone is way below the one I measure during discharge after timer expiration, even after going below 1V.So what makes the above circuit work at all, is not capacitor loss, but the current via the THRESHOLD pin.It's just slow to return to initial state, hence the inaccuracy of the timer in subsequent runs.400uA is quite a lot compared to the 250nA maximum the datasheet I linked for the chip in question specifies. Due to the inaccuracy of the timer I consider the design poor, even if it consumes 0 amps when off.I wonder if a faster discharge is possible. \$\endgroup\$ – Imre Deák Feb 12 '18 at 0:40
  • 1
    \$\begingroup\$ It is very poor indeed, if you are going to make it discharge faster, then you might as well make the proper solution and be done with it. \$\endgroup\$ – Harry Svensson Feb 12 '18 at 0:45
  • \$\begingroup\$ It will mostly discharge through those three resistors across the rails in the 555, plus whatever quiescent current it sniffs out at whatever voltage division that is. \$\endgroup\$ – Trevor_G Feb 12 '18 at 1:20

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.