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I’m working on a low energy device consisting of a couple of IC’s. What is confusing to me is the following, All ICs has a vcc supply range of 1.7 to 3.6V and most of the time the current reading is given @3.3v supply. Chasing the most efficient design what is actually better running at the bare minimum supply ( assuming the internal LDOs has less power to dissipate ) or run at 3.3v?

I have tried to read if there is reduced performance at lower voltage but it is not apparent. The other question that then comes of the back of the previous question, if all ICs has a supply range 1.7 to 3.6 and all IO pins is rated to 3.3v can I run some ICs at 1.8v and other at 3.3v without effecting let’s say SPI or I2C communication ?

These are the ICs MCU infocenter.nordicsemi.com/pdf/nRF52832_PS_v1.4.pdf Radio semtech.com/uploads/documents/sx1272.pdf GPS u-blox.com/en/product/sam-m8q-module. I found a new MPPT DC reg from ST this one. st.com/content/st_com/en/products/power-management/… The idea is to run the MCU from the 1.7v LDO and only when Battery charge is sufficient enable the 3.3 VDO that feeds the rest of the system. My concern would be the UART and SPI coms between GPS and Radio IC... and MCU

Any advice is appreciated

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    \$\begingroup\$ It's easier if you link to the datasheet for your ICs. To answer this we have to point to specifics in the datasheet, because no one can guarantee that every IC behaves the same - especially not you, the designer. \$\endgroup\$ – pipe Feb 12 '18 at 16:04
  • \$\begingroup\$ Am guessing you're assuming microcontroller IC's. Often, lower voltage requires slower clock speed. For example MSP430L092 can run 4 MHz clock between 1.5 - 1.65V, but only 1 MHz between 0.95 - 1.5V. CMOS logic chips also slow at lower supply voltage. \$\endgroup\$ – glen_geek Feb 12 '18 at 16:33
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From looking at IC datasheets from Atmel and TI, it generally looks like you get lower current consumption at lower voltages, at least for digital/switching circuits. If we knew what specific chip you were talking about, it could help.

If the ICs are rated for 1.7-3.3V, you can certainly run them at 1.7V with no issue, although be aware of possible reduced operating ranges as glen_geek points out. An example of this would be page 346 of the Atmega88PB datasheet.

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You can also see from table 34-4 that the scale up of current vs speed/voltage is not linear. 1MHZ at 2V is max 0.5mA (1 mW/MHz), whereas 8MHz at 5V is max 9ma (5.6 mw/MHz). This implies that, as long as you don't need a high speed for some other reason, it's better to use a low speed and voltage.

As MCG notes, level conversion is often necessary for bidirectional communication at different supply voltages, although this need not be power hungry, as there are devices available with quiescent currents in the microamps.

edited to answer comment: The more complicated MCUs like the NRF52832 are a bit of a special case, because they have internal regulators, and internally only run at one voltage (in this case 1.3V). That chip in particular has a DC/DC switching converter, which can convert at a high efficiency, so the actual input voltage is less important if this is selected (although lower is still better because the efficiency is not 100%). If using the internal LDO, then it doesn't really matter if you convert externally or internally EXCEPT I'm not 100% sure what happens with the GPIOs in terms of power.

The GPS also includes an LDO, so you dont get any gains from LDOing beforehand. This changes, however, if you use a switching converter.

This sort of shows a general principle, which is that advanced RF systems (i.e. not just an OOK SAW modulator) will only run at a specific voltage. They will therefore tend to have an integrated regulator, which is either an LDO or a DC/DC converter. If an internal LDO, you can get significant savings from externally using a DC/DC regulator. If it's an internal DC/DC, you can get some limited savings from using a higher efficiency DC/DC converter, but really not that much probably.

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Ideally, it would be best to keep the majority of your circuit at the same voltage. The reason alot of datasheets will have the readings at 3.3V (for a 1.6 - 3.6V device) is because that is a commonly used voltage. You will find a lot of datasheets will have multiple graphs showing the operations of devices at different voltages and currents. Mostly you will find the voltages to be 3.3V, 5V, 9V, 12V and so on, as they are very common. I would just stick with the 3.3 if I were you, as you can get a known performance, and some devices may not behave as well in the lower supply regions (depending on what load you are driving etc) And if yu want different supply voltages to different ICs, you will probably need to level shift signals, so I wouldn't bother.

Stick with 3.3V, or if you are really concerned, you'll just have to perform your own tests at different supply voltages.

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  • \$\begingroup\$ Performing your own tests at different supply voltages is a risk. Chips from different batches may behave different at unspecified supply voltages. \$\endgroup\$ – Uwe Feb 12 '18 at 18:04
  • \$\begingroup\$ I meant within the stated tolerance of the device. \$\endgroup\$ – MCG Feb 12 '18 at 18:11
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Generally power dynamic power consumption of a CMOS MCU will be roughly proportional to the square of the supply voltage, and proportional to the clock frequency so you can potentially get big savings by reducing the power supply voltage (staying within specs to guarantee operation over temperature, of course).

If you have to lower the clock speed to stay within guaranteed operation parameters, the required calculations (clock cycles) will take longer (in microseconds). This does not mean more power directly because the current will further drop proportional to the clock frequency but the cost of keeping the other peripherals alive rather than sleeping between bursts of calculations may make a significant difference.

There is typically also leakage, which can be significant, especially at higher temperatures, and often peripherals add significantly to the current (eg. brownout reset, analog peripherals and so on). You may see linear savings in consumption with such parts of the micro.

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  • \$\begingroup\$ This would be intirely possible, the program flow of this device does not require fast or accurate calculations so the device will be set to minimum clock speed and operations regardsless of voltage. This question is more pointed towards energy saving and power rail simplification. Currently I would have to have a energy harvesting ic, charge controller , regulator and battery gauge ic all separately. The program flow would wake up every 30 min enable gps get reading . Disable GPS , enable radio and transmit the gps data. By using the IC above none of the above ics are required apart from gaug \$\endgroup\$ – Rustie0125 Feb 12 '18 at 18:58
  • \$\begingroup\$ And by powering the mcu only from 1.7v Rail would mean the rest of the equipment would be completely switch of and not just in sleep or shutdown mode giving a further saving. From the answers above I can deduce that having the system operate at 3v3 is preferred but due to nFR mcu internals running 1.3v I’m still wondering if the mcu can be powered by 1.7 initially and then used to 3.3 once second LDO is enabled to avoid level shifting in communication lines.? \$\endgroup\$ – Rustie0125 Feb 12 '18 at 19:03
  • \$\begingroup\$ Maybe it would be better to put it to sleep and wake it up again with a different Vdd. Slewing Vdd may result in undesirable behavior. \$\endgroup\$ – Spehro Pefhany Feb 12 '18 at 19:34

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