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I see expensive OCXO and TCXO oscillator on market that used on Milcom and Satcom transceiver. I'm wondering on what application phase noise of more than -150dBc/Hz in 10KHz is critical and how such a high performance can help the communication system vs cheaper oscillators with -120dBc/Hz in 10KHz

Note: I'm not asking for the effect of phase noise on communication system. I'm asking for what application the phase noise are so important that they should use TCXO or OCXO oscilator with such a high performance.

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Phase noise can be detected by a phase detector. This means that in a FM receiver there will be more audible noise when the local osc has phase noise because phase noise is demodulated in the FM detector. Digital systems that rely on phase information will experience higher error rates. AM systems that use envelope detection are relatively insensitive to phase noise. If a transmitter has phase noise its spectrum can extend out more than intended spilling into adjacent channels. Phase noise can be thought of as short term drift. Old school LC oscillators with valves had terrible long term drift but good phase noise performance. Synthesizers have basically non-existent long term drift if the reference osc is good. However phase noise can be very bad. If a VCO gets noise on its control voltage pin there will be lots of phase noise.

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  • \$\begingroup\$ Thanks for your answer Autistic, but you miss the point that I'm not asking for the effect of phase noise on communication system. I'm asking for what application the phase noise are so important that they should use TCXO or OCXO oscilator. This is absoulutly in complex digital modulation for satcom as the signal is attenuate over 120dB over the air and using analog modulation is out of question \$\endgroup\$
    – pazel1374
    Feb 13, 2018 at 16:34
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For ADC/DACs, it is quite visual. Let's sample a signal (image from wikipedia):

enter image description here

The point at t=1 is on a high slew rate part of the waveform. Phase noise on your clock is a frequency domain concept, which corresponds to jitter in the time domain. Jitter adds time noise to the sampling instant.

Thus, here, our signal at t=1 has a voltage v and a slew rate dv/dt.

With "n" the amount of time-domain noise (jitter) the sampling instant is now t=1+n

Thus the value acquired is now v + n dv/dt

In other words sampling jitter introduces noise that is proportional to the product of jitter and slew rate. For fast ADCs with enough bits, the manufacturer will usually explain in the datasheet that the specs will only be met if the clock has less than a specific jitter.

divB posted this graph in the comments, it's quite explicit:

enter image description here

This is compounded by the fact that you can only get low phase noise crystal oscillators at "low" (by today's standards) frequencies. If you need 1GHz some PLL multiplication will be required, and as Tony Stewart mentions, this degrades phase noise. An intuitive explanation of this is that the PLL can't remove time-domain jitter in the original clock outside of its filter bandwidth, so this jitter is also present in the output, but it is larger relative to the shorter period of the higher frequency output signal. Expressed in phase noise terms, this gives the equation quoted by Tony.

Another one: here's your carrier. Ignore the legend, this is just an image from the web as an illustration.

enter image description here

Say you receive a signal, and multiply it with the carrier of frequency in order to demodulate it. The resulting spectrum is the convolution of the carrier spectrum and the received signal spectrum. This means the two phase noise peaks at +/- 100kHz from carrier will grab the noise at these frequencies and fold it back on top of the signal you actually want. This degrades SNR, especially in multiple close carrier modulations.

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    \$\begingroup\$ This is a great answer; let me just add: Jitter is integrated phase noise and it is actually the limiting factor for high speed data converters. This plot shows the relationship nicely: electronicspecifier.com/cms/images/… . It is extremely hard to get sub-ps rms jitter in SoC environments (around 50fsrms may be possible only in a dedicated, highly optimized design) \$\endgroup\$
    – divB
    Feb 13, 2018 at 8:01
  • \$\begingroup\$ thanks @peufeu, this answer is what I'm asking nevertheless I believe that this isn't the only subject that need ultra high performance oscillator. If you can provide other application and complete the answer I will accept it. Again Thanks for your great answer. \$\endgroup\$
    – pazel1374
    Feb 13, 2018 at 16:23
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Phase Noise in dB adds up by 20 (log N) when frequency is multiplied by N from the Xtal to the PLL f out.

  • For example, deriving a 1 GHz signal from 10 MHz will increase the phase noise by 40 dB.

Even if the 10 MHz oscillator has a very low phase noise floor of -175 dBc/Hz, for example, the lowest possible floor at 1 GHz is -135 dBc/Hz, even before the noise added by the multiplier or PLL is taken into account.

A cheaper 10MHz XO at -125 dBc/Hz @ 10kHz offset multiplied with 40dB rise to 1GHz would be -85 dBc/Hz @ 10kHz offset in theory.

Generally TCXO's have the same Phase noise as XO's using AT-cut Xtals except they are temper compensating parts from 20ppm to 1 ppm or 50 ppm to 2 or 3 ppm over a wide temp range.

But OCXO's use SC-cut crystals which have a Q of 100k~1M, compared to AT-cut Xtals with Q=10k+ so f stability also reduces from 20ppm to 20 ppm

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  • \$\begingroup\$ Thanks Tony, your equetion in right but not quietly. first of all VCO had loop filter on their control path that can greatly decrese phase noise and had bandwidth less than 5Hz (see AD9548 as an example). so the phase noise is not so linear as you mentioned. Although I saw this equation in literatures this is not the case in practical case. please correct me but TCXO as the one I mentioned in question have lower phase noise (moreover the temper compensating parts) \$\endgroup\$
    – pazel1374
    Feb 13, 2018 at 16:33
  • \$\begingroup\$ You can reduce BW of VCO to less than 10kHz but then phase noise is still multiplied with 10Hz offset , so it depends on your system spec. i.e. if using spread spectrum maybe ok, but not for narrow band. No TCXO does not compensate phase noise, only f error correction. Q of 10k cannot be increased with TCXO \$\endgroup\$ Feb 13, 2018 at 17:28
  • \$\begingroup\$ There's also a tradeoff between PLL loop filter bandwidth and lock time, so you may not be able to reduce the loop filter bandwidth as much as you want. \$\endgroup\$
    – rfdave
    Feb 15, 2018 at 2:58
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While you're interested in the specifics of phase noise, the other requirement that a OCXO or TXCO could meet is an absolute frequency error requirement. Satellite links for LEO/MEO orbits will create a Doppler shift because of the relative velocity of the receiver and transmitter. keeping an accurate reference oscillator in terms of PPM frequency offset can help with a frequency error budget.

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Security radios, used by fire and police, need to cooperate at the scene. This cooperation requires transmitter phase noise to not de-sense another user's receiver; hence the -150dBc/rtHz requirement at 10KHz offset.

If you mean integrated phase noise, in 10KHz bandwidth, to be -150dBc/rtHz, this likely is required due to frequency multiplication from 10MHz to 20,000MHz (20GHz carrier to/from the satellites) with the requirement (as in the first paragraph) to not de-sense the users in adjacent channels.

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