I do not understand how the AND gate circuit shown functions (with high measured as ~6V and low as ~0V at the voltmeter PR1). Primarily I think I'm confused about the interaction between both power supplies and how that affects the behavior of the circuit around the diodes.
With both switches open (as in diagram), the top most supply (labeled as V1) drops its 6V across resistor R1. This is also the case if one of the switches but not both are closed. Can someone explain this behavior?