I am designing a custom PCB interface to be used with some off-the-shelf devices. The relevant off-the-shelf interface they provide is cumbersome and doesn't fit my application, so I am designing my own.

I would like to control the impedance of the communication lines connecting my devices, but after some reverse engineering to try and find their termination scheme I find something I've never seen and can't find anywhere else: it's double series terminated. Don't even know what to call it really.

the whole bus

A1 and A2 are just signal buffers. A1 represents the source, R1 is part of the source. T1 represents the line I am trying to design. A2, R2, R4, C1 is one device's receiver. And A3, R3, R5, C2 is a different device's receiver. The application allows for multiple devices to connect to the same bus, essentially in parallel. Notice the two 50ohm resistors in series with the line. I don't know what to do with this.

Also as point of interest. One of the communication lines is different. In place of R1 there is a series inductor and series R=100. Everything else equal. My assumption is that is some sort of clock.

What do I control my TL's characteristic impedance to, if anything? Has anyone seen something like this before or have any suggestions?

  • 1
    \$\begingroup\$ What is the input impedance of A2 & A3? If it's high, then R2 and R3 aren't going to have much effect, and you just have an ordinary series terminated line. \$\endgroup\$ – The Photon Feb 16 '18 at 19:46
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    \$\begingroup\$ If A2 & A3 have 50-ohm input impedance, then you have two 100 ohm loads in parallel, giving 50 ohms for the two loads; Now you have your line matched at both ends. This isn't the most power-efficient way to do things, but it may reduce ringing relative to just terminating the source end. \$\endgroup\$ – The Photon Feb 16 '18 at 19:48
  • \$\begingroup\$ This is the driver they are using on both ends: ti.com/lit/ds/symlink/sn54ahc126.pdf <br/>Not much info is available just the load capacitance. \$\endgroup\$ – j33205 Feb 16 '18 at 20:04
  • \$\begingroup\$ @ThePhoton Well I just presented 2 devices in parallel, but they can be such that there are up to like 6 devices in parallel on the same bus. So I think that approach breaks down. At this point I'm inclined to think that the driver's input is high impedance. But why have R2 there at all? \$\endgroup\$ – j33205 Feb 16 '18 at 20:15
  • \$\begingroup\$ You can guesstimate the input impedance of the HC126 from the \$I_I\$ spec, and it's well over 1 megohm. I don't think R2 and R3 are doing anything useful in this circuit in normal operation. They might be there to limit current in case the other cable end gets connected to a high voltage. They might be intended to damp ringing in the line with the idea of optimizing their values later (but I'd expect a 0 or 1 or 4.7 ohm resistor in that case). \$\endgroup\$ – The Photon Feb 16 '18 at 21:30

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