I am designing a custom PCB interface to be used with some off-the-shelf devices. The relevant off-the-shelf interface they provide is cumbersome and doesn't fit my application, so I am designing my own.
I would like to control the impedance of the communication lines connecting my devices, but after some reverse engineering to try and find their termination scheme I find something I've never seen and can't find anywhere else: it's double series terminated. Don't even know what to call it really.
A1 and A2 are just signal buffers. A1 represents the source, R1 is part of the source. T1 represents the line I am trying to design. A2, R2, R4, C1 is one device's receiver. And A3, R3, R5, C2 is a different device's receiver. The application allows for multiple devices to connect to the same bus, essentially in parallel. Notice the two 50ohm resistors in series with the line. I don't know what to do with this.
Also as point of interest. One of the communication lines is different. In place of R1 there is a series inductor and series R=100. Everything else equal. My assumption is that is some sort of clock.
What do I control my TL's characteristic impedance to, if anything? Has anyone seen something like this before or have any suggestions?