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I'm studying digital electronics where the components ALU and multiplexer appear. To me the ALU seems like a multiplexer but it's not specifically mentioned that this is the case. Is it so, or why not?

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    \$\begingroup\$ A "Mux" selects one of many input ports for each output port. Dual Channel Memory is an example that doubles bandwidth using 2 channels for 64bit RAM to make 128bit bus faster. But the ALU computes all your program jumps math in single, double or any precision. It is also used in some ECC circuits. \$\endgroup\$ Jul 13, 2012 at 13:28
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    \$\begingroup\$ While everyone has given good answers, let me add something important: The symbols for a MUX and an ALU are almost identical and easily mixed up. The ALU symbol has a little triangle piece removed between the 2 inputs, while the mux symbol is a simple quadrilateral. While their functions are very different, I can see how you could mistake one for the other. \$\endgroup\$
    – user3624
    Jul 13, 2012 at 14:01
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    \$\begingroup\$ @David - Yes, I was tempted to explain it as the "upside down trousers" and the "boat", but I think I'll keep that for my lecture for 1st graders :-) \$\endgroup\$
    – stevenvh
    Jul 13, 2012 at 14:08
  • \$\begingroup\$ @stevenvh Thank you I'm glad you mentioned the mnemonics "upside down trousers" and the "boat" it's very pedagocial. \$\endgroup\$ Jul 29, 2012 at 8:21

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No, it's not a multiplexer. A multiplexer would select one of both inputs, in an ALU both inputs may be used simultaneously, depending on the pending operation.

ALU stands for Arithmetic and Logic Unit, and those are the types of operations it performs.

If the operation calls for a left shift of register R1, then the second input is ignored, but you might as well have "add the content from RAM address 0x1208 to register R1", then both inputs are used. Before the add can be performed the RAM data must be fetched and placed on one of the inputs, and the content of R1 on the other.

enter image description here

All in all an ALU can perform several logical operations, like adding, shifting, clearing, etc. It's a rather complex piece of logic which works on the operands on the inputs and the operation code.
Operations like "clear A" are simple, but "multiply A and B" requires lots of gates.

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As others have noted, an ALU's function is to perform (typically either binary or unary) arithmetic and logical operations on input busses. You can break an ALU down into three primary stages along with some control logic that configures those stages.

  • Argument Selection: this stage really really is just a Multiplexer for each input that allows for the selection of various inputs for either argument (i.e. RegisterA, RegisterB, MemoryLoad, Pipeline Byassed Value, etc).
  • Arithmetic/Logic Computation: this is where all the math gets done in parallel on the selected / routed inputs
  • Output selection: this can be thought of as a logically as another multiplexer, but for reasons of fan-in/fan-out is often implemented as a tri-state bus with the various output enables driven by a decoder based on the instruction op-code.

Here's a really high level drawing I whipped up to illustrate this partitioning.

enter image description here

There may be debate about whether the first stage and control logic is really part of the ALU, or if it is rather simply part of the Execution stage of the CPU Pipeline.

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  • \$\begingroup\$ +1 for clearly pointing out that a mux is usually a very small piece of a much larger ALU. I wish I could give you another +1 for pointing out that an ALU is performing all math operations in parallel, and the mux selects the operation that was requested by the instruction. \$\endgroup\$
    – ajs410
    Jul 13, 2012 at 22:24
  • \$\begingroup\$ Very interesting. Thanks a lot for the information. I also found VHDL code for an ALU in my digital logic book which helped me unerstand that it is the ALU that makes the CPU understand machine code(?) \$\endgroup\$ Jul 29, 2012 at 19:40
  • \$\begingroup\$ @NickRosencrantz most of the machine code (i.e. instruction bits) are used to control elements of the data path in the various pipelined stages - the ALU ends up doing the primitive mathematical operations dictated by the instructions \$\endgroup\$
    – vicatcu
    Jul 30, 2012 at 1:52
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To me the ALU seems like a multiplexer ...

An ALU performs many tasks.
A multiplexer essentially performs one task.

An ALU could be given a multiplexer function as one of it's features if desired.
ie a multiplexer's capabilities may be a small subset of an ALU's capabilities.

In a typical implementation, both have two inputs and one output.
But the multiplexer carries out only an either/or selection between the two inputs.
The ALU could do this plus addition, OR, AND, XOR, Add, Subtract, ...


Given a single control input C and an n bit A port (with bits A0, A1, A2 ... An) and an n bit B port a multiplexer can be thought of as implementing.

Mout_x = A_x.C + B_x./C for all x = 0 ...n

"." = logical AND
"+" = logical OR.

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    \$\begingroup\$ It's an interesting question if there are any practical ALUs out there which cannot function as multiplexers. At first one wouldn't think so, but then there are some really unique architectures. \$\endgroup\$ Jul 13, 2012 at 14:28
  • \$\begingroup\$ @ChrisStratton AFter doing some more research what is what here I'm beginning to think that an ALU can be disabled to work like a MUX so an ALU could be the baseclass for a MUX and not the other way round. Thank you for the comment (+1). \$\endgroup\$ Jul 29, 2012 at 19:44
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No it's not a multiplexer. An ALU is an Arithmetic Logic Unit.

It does what the name suggests, perform various arithmetic and logical operations like add, subtract, multiply, shift, AND, OR, etc.

ALU

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  • \$\begingroup\$ Thank you for the answer. I'm thinking the relationship could be thought of the other way round, that a MUX is like an ALU which has some of the functions disabled. \$\endgroup\$ Jul 29, 2012 at 19:41
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An ALU performs multiple arithmetic/logic operations depending on the "function" selected.

It's only a mux in the sense that the selected "function" will select the appropriate result to send to the output.

As an example, ADD two numbers, AND two numbers together. Then, the "function" multiplexes either the ADD or AND results to the output.

Incidentally, this is how some ALU inside microprocessors are designed.

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  • \$\begingroup\$ Thank you for the answer. The book I'm using is Digital Logic with VHDL Design and your answers help me understand the text. Now the other 2 things I must study more are Karnaugh maps and 4-LUT which I don't understand completely. Thanks again for the help. \$\endgroup\$ Jul 29, 2012 at 19:42
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enter image description here4Way MUX can use AB to select a logic result from a truth table lookup. 4way MUX can also series prefix the path of an arithmetic borrow chain. Be sure to use a transmission gate multiplexer for ripple-free borrow. Wire 00 and 11 to propagate borrow. Wire the 10 and 01 cases to GT LT. Both 4ways may share the same AB control (ie: 74CBT3253)

Now a 74LVC2G86 XOR gate (or 4Way MUX wired for XOR if we must) combines logic with arithmetic for a final result. Careful to XOR using the input borrow. Don't use output borrow yet. Output borrow is for the next slice.

Another XOR may be used to flip B input for addition. Suggested LVC2G86 dual gate already offers the spare XOR, no extra chip would be required. Each slice of 2 ICs neatly fits on a 28pin SSOP to DIP converter.

So, what happened to the rest of our ALU? Didn't need it, MUX does it all. If you insist to MUX between solutions, consider that only for shift right. MUX have better uses than selecting between functions AND OR XOR they can already perform without those circuits.

Simple was the reason to wire a borrow chain rather than Manchester carry. Same parts can wire either way, but addition will serve only one function. Borrow serves both A-B and B-A. Also six comparison functions activated by GT LT and EQ (aka borrow). Testing A<=B simply requires LT with EQ.

Relay schematic because my transmission gated circuit was wired for carry. My relay drawing is more similar to the text of this post.

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  • \$\begingroup\$ In what way does this answer the question, or adds anything new to the already existent anwers? \$\endgroup\$ Aug 12, 2022 at 15:10
  • \$\begingroup\$ So the true nature of a bridge rectifier is a XOR gate :) \$\endgroup\$
    – Jens
    Aug 12, 2022 at 22:04
  • \$\begingroup\$ Some explaining words addressing the original question would be welcome \$\endgroup\$
    – Jens
    Aug 12, 2022 at 22:06
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Voltage difference across the coil gives XOR logic. Redundant diode bridge XOR is not required for logic, but to light the relay's LED in either direction, also to dissipate residual energy of the coil.

The original question, "is ALU MUX?". Not usually, but certainly can be.

I give the MUX schematic (wired for Carry) to demonstrate that way also... enter image description here Two SSOPs per slice. Ready to be wired. enter image description here

The 8086 ALU also worked similarly: http://www.righto.com/2020/08/reverse-engineering-8086s.html Scroll down about 1/3 to "One bit of the ALU circuitry in the 8086."

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