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Are test pins on sensitive signal lines likely to cause problems? For example, if there is a test pin sticking up from the board on a line going to a 20 bit ADC is there a danger of increasing the noise?

Has anyone experienced such problems?

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The only answer is "it depends". If you use 20bit 100Hz ADC, proper filtering would mitigate any test points.

Other than that more details is required. With 20bit i guess you are mostly afraid of the mains 50Hz coupling. But other sources of interference may be there as well.

Best advice- do everything best you can. Use good cables, ballanced differential lines, and keep budget for the second layout.

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  • \$\begingroup\$ Yes. I was wondering whether anyone had any examples of such problems. I will include it in the question. \$\endgroup\$ – Dirk Bruere Feb 23 '18 at 14:51
  • \$\begingroup\$ One of the most important questions is what equipment do you have around. I happened to debug a high voltage switching device last week. Things may look extremely weird if you don't exactly understand them. All kinds of voodoo effects appear, just always remember that there is no magic, it's only your (or mine) inability to understand \$\endgroup\$ – Gregory Kornblum Feb 23 '18 at 14:55
  • \$\begingroup\$ This is a more generic kind of quesion, although we do have boards with nA signals feeding into a 24 bit ADC. Screened input, grounded metal box. However, there are still digital signals a few cm away from such points. \$\endgroup\$ – Dirk Bruere Feb 23 '18 at 15:11
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For example, if there is a test pin sticking up from the board on a line going to a 20 bit ADC is there a danger of increasing the noise?

If the test pin is positioned in a place that by-passes the ADC anti-alias filters and the analogue BW of your ADC was high-enough, you could certainly get aliasing of high frequency noise that is picked-up from the test pin (aka high frequency monopole antenna).

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Here is a 22-bit ADC, after 3 opamps providing Av = 5,000 to make a 1milliVolt input become 5volts into ADC. The key is LowPassFilter right before ADC, with large capacitor to shunt electric fields to GND, and to shunt millivolts of random thermal noise to GND. That LPF is 10Hz, 16Kohm and 1uF.

I activated 3 of the 4 Electric Field interferers inside Signal Chain Explorer; one is MCU clock, one is 60Hz sin, one is 60Hz spikes. And I activated the Gargoyles mode, with Interconnects (I/C button) also enabled, which brings 14mm long PCB trace into the connections between each stage. 14mm is approximately the size of the Test Pins you asked about.

enter image description here

What is your ENOB? effective number of bits? 15 bits. Not 22. Cure? provide a signal of 10 milliVolts, and get 3+ more bits. Or provide a signal of 100 milliVolts, use gain of only 50X, and expect approx. 22 bits.

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