For LVDS, it seems like the traces are usually specified as 100 ohm differential impedance. What should the single end impedance be from each trace to ground?

I'm looking at PCB impedance calculators, for example the nice list here: https://www.fedevel.com/welldoneblog/2011/08/pcb-impedance-calculator-single-ended-differential-pair/

Using http://www.skottanselektronik.com/impcalc_en.html, I can put in er=3.66 and w=0.30 t=0.035 h=0.17 s=0.7 (all in mm) and I get Z0=50.52 ohm, Zdiff=100.1 ohm. Is this correct for LVDS?

(This is supposed to match the OSHPark 4-layer stackup)

It seems that by adjusting w (width) and s (spacing), different combination of Z0 and Zdiff can be obtained; Zdiff seems to be < 2*Z0, and approaches 2*Z0 as s gets large. At closer spacing Zdiff can be much less than 2*Z0, for example w=0.17 s=0.10 produces Z0=69 ohm and Zdiff=100 ohm. Is this also okay for LVDS? Is it better than 50/100?

This is my first time dealing with LVDS, sorry if this is too basic a question but I couldn't easily find an answer anywhere. The part I'm using supports LVDS1.8 per IEEE 1596.3-1996, if that helps.

  • \$\begingroup\$ You can have each separately 50 ohms to ground or 100 differential \$\endgroup\$
    – scuba
    Commented Feb 25, 2018 at 3:06
  • \$\begingroup\$ LVDS is also used for CPU and PCIe connections, or channels. They work at GHZ frequencies so the termination resistor is normally 22 ohms to a 1.35 volt common ground for PECL parts. Note that PCIe is capacitor connected. \$\endgroup\$
    – user105652
    Commented Feb 25, 2018 at 3:21
  • \$\begingroup\$ @Sparky256, LVDS and PECL are two different signalling standards. If it's a "PECL part" it's not LVDS, and if it's an LVDS part it's not PECL. \$\endgroup\$
    – The Photon
    Commented Feb 25, 2018 at 3:31
  • \$\begingroup\$ @scuba, it is expensive from PCB area standpoint to have "each" separately, too much space is required. From signal integrity (cross-talk) point it is better to keep traces tightly coupled. \$\endgroup\$ Commented Feb 25, 2018 at 3:42
  • \$\begingroup\$ Contrarily you may not be able to fit the entire pair within tight spaces without violating clearance rules when routing(breaking out high density connectors, fine pitch bga parts etc.) so from that perspective it may be easier to keep them separated when routing PCB \$\endgroup\$
    – scuba
    Commented Feb 25, 2018 at 3:44

1 Answer 1


LVDS uses 100 ohm differential impedance, which if implemented with two isolated lines would require two lines of 50 ohm impedance.

Do not get confused with coupled lines that appear to have a different Zdiff to Z0 ratio.

At closer spacing Zdiff can be much less than 2*Z0, for example w=0.17 s=0.10 produces Z0=69 ohm and Zdiff=100 ohm. Is this also okay for LVDS? Is it better than 50/100?

Think about what the Z0 of a 'single line' might mean. What are you doing with the other line of the diff pair? Has it been moved away to infinity? If so, you've changed the geometry between measurement and use, so it's meaningless. Are you grounding it? If so, you're driving the diff pair differently between measurement and use, so it's meaningless. Are you driving it with the inverted signal? Now you're measuring it and using it the same way. This inverted drive to the other line creates a zero voltage plane (aka an electric wall, or a virtual ground) between the lines, and pulls the impedance of the line you're measuring down below what it would be if you ignored or grounded the other line.

Unfortunately the skottanselektronik.com line calculator you used presents you with this meaningless Z0 figure to confuse you. Substituting those figures back into its single line microstrip calculator gives exactly the same Z0 figure. This demonstrates that it's giving you the impedance when the other line is moved away to infinity, which is a different geometry to what you're using, so meaningless.

When you use a line calculator with a proper 'diff pair' mode, it will take account of the geometry and the correct driving conditions, and provide you with a pair of lines that has 100 ohms differential impedance, and two lines of 50 ohms impedance when the other line is driven with an inverted signal. If you do something else with the other line, then sure, its single ended impedance will calculate higher than 50 ohms.

A rule of thumb for FR4. An isolated single line above ground will have 50 ohms impedance if it's twice as wide as the substrate thickness. Two coupled lines driven differentially will be narrower than that, due to the extra loading from the virtual ground between the two traces.

Bonus points, you do not need to read this if you are a digital engineer, but it may be interesting for the RF guys. There are two relevant impedances with two coupled lines, Zodd and Zeven. Zodd is just half the Zdiff we've been discussing so far, the impedance of one line when the lines are driven differentially. Zeven is the impedance when the other is driven in phase. What does this do to the space between the lines? It increases the impedance, by shielding some of the ground that the line would see otherwise, it introduces a 'magnetic wall' in the jargon. Now while you'd never drive a pair of lines like this with logic signals, which is why the digital guy need not have read this far, if an RF guy sends a signal into one line of the pair, that unbalanced signal can be thought of as the sum of an even mode and an odd mode, which then propagate into different impedances, and we introduce the new (big) subject of RF couplers! The skottanselektronik calculator does not give a Zeven figure.

  • \$\begingroup\$ The LVDS Vp is a 8 mA CC ( high Z) and Vn is a low resistance switch to Vref. But normally an R network at source creates a symmetric Zdiff/2 for each pin with series & shunt R to match the 50 ohm single line \$\endgroup\$ Commented Feb 25, 2018 at 7:36

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