direct digital synthesis low pass filter

Question

I am designing a sine wave generator using a dds chip (ad9833). The system parameters are:

• frequency range of 1-12 MHz
• spurs and harmonics down to -50 dBc
• Output power atleast 10 dBm

Since the frequency is changing, the low pass filter cutoff has to be adjustable. My first thought was to have a mosfet controlled capacitor bank, but the capacitances of the transistor are limiting the range of the cutoff. I have also tried varactors but I am having trouble simulating them in LTSpice. I would like for this circuit to be an LC filter. Last resort is to have different filters for different key frequencies, like 1 MHz, 2 MHz, 4 MHz, 8 MHz, 16 MHz, but how would I switch between filters using a microcontroller?

Answer 1

It's not the frequency of the output signal your filter is designed for, but rather the clock thats running through the tabulated entries inside the DDS.

The external clock signal that is provided is what's driving the change in output. You're low pass filter will be designed for this frequency. Take a look at the following section from Analog's guidelines for their DDS products:

http://www.analog.com/en/analog-dialogue/articles/dds-generates-high-quality-waveforms-efficiently.html