By changing the gate-source voltage of the NMOS transistor, I can alter the resistance in the triode region. The transistor becomes a voltage-controlled resistor.
I don't understand how it affects the high pass filter and the \$I_{\text{DS}}\$ current when I decrease the voltage to 2.0 V.
I decreased the voltage here in V2 and I got this graph.
And for the V2 = 3.3V I have got this result.
Where I can see that the voltage to the gate doesn't affect the high pass filter.