# Why the DC voltage doesn't affect the high pass with the NMOS Transistor?

By changing the gate-source voltage of the NMOS transistor, I can alter the resistance in the triode region. The transistor becomes a voltage-controlled resistor.

I don't understand how it affects the high pass filter and the $$\I_{\text{DS}}\$$ current when I decrease the voltage to 2.0 V. I decreased the voltage here in V2 and I got this graph. And for the V2 = 3.3V I have got this result. Where I can see that the voltage to the gate doesn't affect the high pass filter.

• I can see that it does. But the difference will be easier to see in a frequency response plot. Feb 26, 2018 at 14:52

• What happens if we now change V2's DC voltage to 2V rather than 3.3V? When we decrease the voltage of the DC to 2.0V we go to the lower state of the user characteristics graph of the transistor where we have a smaller slop. . And we know that the slop depends 1/R and the resistance for 2V will be higher than the resistance for 3.3 Volts. And from the Ohm's law we can find out why it influences the high pass filter.