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I have an STM32 driving two very similar SPI Flashes, an N25Q and an M25P.

Strangely, while my driver copes with the N25Q perfectly well, the M25P is only "half" working. What happens is that when I write a page of bytes, and read that page back, the four MSB bits of each byte is 0, and the four LSB bits of each byte is correct.

What could be causing half the bits to be 0?

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  • \$\begingroup\$ Is it a driver written by you or you took it from somewhere? I am looking for a driver source code or example for N25Q from STM32 and so far I found only this electronics.stackexchange thread, however I think pointing out the driver would be helpful for some users who will find this Q&A's here. It is relevant though. Thanks. \$\endgroup\$ Commented Jan 1, 2016 at 16:32

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Did you erase the affected memory pages first? For flash memory, you can change only 1's to 0's (the M25P data sheet from above states this explicitly on page 22, in the N25Q its on page 12). So if the M25P was filled with 0x0f's before, you would get exactly that result. When you use the same write command (0x02) for both, you should be fine. Using dual or quad mode would result in in 2 (or 4) bits wrong, but not half a byte. Since I suppose you program a whole page, I think this can't be stuck address bits. Other sources for the problem might be: missing blocking capacitor for the flash IC, or wrong SPI mode (which can cause strange results since then normally you read data exactly the moment it is changing). The latter one can be checked with a logic analyzer or a scope.

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  • \$\begingroup\$ Thanks. That was the problem. So is it not possible to write to the Flash memory reliably without first making a sector erase? Quite expensive, given that a sector erase takes 1 second... \$\endgroup\$
    – Randomblue
    Commented Jul 16, 2012 at 19:39
  • \$\begingroup\$ This has nothing to do with reliability - it is just the way flash memory works. You can only delete bits, but setting the must be done via erasing them beforehand (In that sense they work like an EPROM). But there are some flash devices out there which do this erase and write process transparent for you (but it doesn't get any faster). \$\endgroup\$
    – hli
    Commented Jul 16, 2012 at 19:59
  • \$\begingroup\$ I like the sound of experience in this answer.. I wonder how smart the smart Flashcontrollers rotate unused sectors previously erased to circumvent slow writes on demand and rotate usage equally to speed up virtual W/R operations. \$\endgroup\$ Commented Jul 16, 2012 at 23:14
  • \$\begingroup\$ Maybe that is only done at soft or firmware levels for Out Of Memory (OOM) Groupings, Priorities and LowMemoryKiller, defragmentation on the fly.... Sector format time is such a valuable time to waste. \$\endgroup\$ Commented Jul 16, 2012 at 23:21
  • \$\begingroup\$ This rotation is a firmware thing AFAIK (that's why there are always some firmware bugs in these SSDs :) Needing to read areas which you to write into memory, erasing them and then re-writing them is the reason why flash memory is much slower during write operation than for reads. \$\endgroup\$
    – hli
    Commented Jul 17, 2012 at 5:00
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One obvious reason is if you were attempting to use dual and quadrature data "fast write" functions designed for the N25Q that are not supported on the M25P. But I suspect you know that already.

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  • \$\begingroup\$ That's a good idea, but I'm not using dual or quad data. \$\endgroup\$
    – Randomblue
    Commented Jul 16, 2012 at 17:24
  • \$\begingroup\$ Stuck address bits inside chip from failure may be decimating your memory. Is it functional? Can you debug the interface signals against chip spec? \$\endgroup\$ Commented Jul 16, 2012 at 17:30
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Do you have a different number of dummy bits set for the M25P? This would possibly account for what you are seeing if reading back a byte at a time.

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