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Some many years ago my teacher taught us to program Xilinx Spartan II development board. He taught us to think of the hardware element we wanted to invoke (logic gate, adder, shift register, etc) and then check the Xilinx XTS manual for the Verilog code pattern that implements that hardware (In Chapter 2 of the manual: XST HDL Coding Techniques).

Now, moving to Altera and following several tutorials and guidelines I don't find mentions of code patterns. Everything is coded based on what behavior you want, almost like coding C, without an awareness of what hardware behavior you're invoking, which is exactly what my teacher taught us we shouldn't do.

So, this leaves me with a few questions: Does Altera provide code patterns for Quartus II (I have a Cyclone II devel board), like Xilinx does with XTS? What is the most advised design technique?

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    \$\begingroup\$ ridl.cfd.rit.edu/products/manuals/Altera/qts_qii51007.pdf \$\endgroup\$ – Mitu Raj Feb 28 '18 at 12:29
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    \$\begingroup\$ Chances are, whatever brand of programmable device and development toolchain you're using, the same patterns will apply, and a given code will infer the equivalent hardware behind the scenes (if available on the target device, of course). The very purpose of a synthesis tool is to be able to identify the appropriate hardware blocks to be inferred. They are pretty good at this, and I am pretty sure all manufacturers apply more or less the same rules in this process. But of course, I can't guarantee it. \$\endgroup\$ – dim Feb 28 '18 at 15:33
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So, as I understood from the answers given and documentation, low level elements, like multiplexors combinatorial gates, are interpreted efficiently by all brands' synthesizers and have the same/similar HDL pattern.

Now, higher level implementations, like DSP functions (multiplayers and what not), can be implemented through the use of device specific templates (or in the case of Altera, through megafunctions) that can be found in the IDE design software itself. Also, each device will have dedicated hardware, like PLLs for clock generation or even DSP cores, whose functionality can be accessed also through the use of specific templates (which are infered to that specific hardware by the compliler) or special functions, like Altera's megafunctions.

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