he switching threshold is the input voltage where the output crosses VDD/2. I want to redesign the circuit such that the witching threshold is VDD/2. enter image description here

  • 1
    \$\begingroup\$ What is it currently switching at? \$\endgroup\$
    – Andy aka
    Mar 1, 2018 at 8:38
  • \$\begingroup\$ Design each to have the same Vgs and RdsOn at 1.5V \$\endgroup\$ Mar 1, 2018 at 8:57
  • \$\begingroup\$ As drawn there may already be a witching issue. \$\endgroup\$
    – Nedd
    Mar 1, 2018 at 9:54
  • \$\begingroup\$ @Andyaka current switching at 0 to 3.3 \$\endgroup\$ Mar 1, 2018 at 9:55

2 Answers 2


Design each to have the same Vgs(th) at 1.5V and similar RdsOn (although Nch tends to be lower. (Vt is 1.5 for CD4000 Logic I recall)

Verify by measuring input voltage and supply current and self bias with a 10k negative feedback R , It can be 10M but then DMM will load it.

Then verify transfer function with and without load and see the change.

enter image description here /tinyurl.com/y7zmjpsw or

  1. Fix the NMOS dimension
  2. Vary the PMOS width until it will give you the same current as the NMOS at |VGS|=VDD/2. The PMOS width is usually 2-3x more than the NMOS due to ratio of hole and electron mobility.

Note that it will only be precise at only one supply voltage, temperature value and one process corner, without taking into account statistical shifts due to mismatch. Also, an inverter has other specs than the threshold voltage. Threshold is just of them. (propagation delay for given drive and load, ride and fall times for a given load and their symmetry, minimum/maximum supply)

  • \$\begingroup\$ The quickest way to find the switching voltage is to 1) remove V1, then connect the input to the output. Yes, input and output shorted. 2) do a DC simulation and observe the voltage at the output. 3) Chance the width of the PMOS until the voltage is how you want it. I agree that this voltage changes over basically anything so do not rely on it being accurate. For an accurate solution use a resistor divider and a comparator. \$\endgroup\$ Mar 1, 2018 at 8:57
  • \$\begingroup\$ |Vdd/Vgs(th)| needs to be more than 2 for low Ron \$\endgroup\$ Mar 1, 2018 at 9:14

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