Would that mean that the max number of operations that can be executed
by the CPU be: \$3\cdot 2^6 = 192\$
Not quite. The CPU needs to be able to distinguish whether an instruction is an R, I, or J type instruction from the opcode, so the number of opcodes is just \$2^6=64\$. However, the R type instructions also contain the 6 bit funct
field which acts as another opcode field for the R type instructions. R type instructions always have an opcode field of 000000
, so your total number of instructions is \$2^6-1 + 2^6=127\$, because you have \$2^6\$ opcode encodings, but you use one to select the R type instruction, where you then have \$2^6\$ more instructions from the funct
field.
Also, would the number of registers in the CPU be: \$2^5=32\$
Yep, MIPS has 32 registers.
Which would then make the main memory be:
\$32×4bits=64bits=8bytes\$
I'm not sure how you're getting this. The (maximum) size of main memory depends on how many bits are in an address * the smallest addressable unit. MIPS has 32 bit addresses (that's what a 32 bit cpu usually means), and the smallest addressable unit is 1 byte. That means the maximum amount of memory is $$2^{32}bytes = 4,294,967,296bytes = 4GiB$$
But how do you use a 32 bit address if there's only 5 bits per field in an instruction? MIPS is a Load-Store architecture, which means most instructions only interact with registers, and only load and store instructions can access memory. So for example, say I want to add 5 to the int stored at address 0x14859868:
lui $8, 0x1485 # load upper 16 bits into register 8
ori $8, $8, 0x9868 # load lower 16 bits into register 8
lw $9, 0($8) # load register 9 with the contents of memory at 0x14859868
addi $9, $9, 5 # add 5 to the number in register 9
sw $9, 0($8) # store the contents or register 9 to
# the memory pointed to by register 8
Instead of specifying the address directly, I load the address into a register ($8
) and use it as a pointer to access the memory.