I am trying to build a transceiver for a stepped-frequency radar. As a starting point, I am trying to generate my signal on NI's AWR VSS software. I am able to generate my signal but don't know what should be the step time for changing one frequency to another.
I know that higher the step size longer the lock time. But How should I read the commercially available PLL frequency synthesizer datasheet to find out the information and can generate my stepped frequency vectors?