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I'm trying to use a LSM6DS33 6-axis accelerometer/gyro chip as an inertial navigation aid, participating in sensor fusion. The problem is that the application has large amount of vibrations and the accelerometer data is quite noisy. I need around 25 accelerometer samples per second, so to get a smoother signal I have enabled the analog low-pass filter at the lowest BW = 50Hz and the accelerometer ODR is 104 Hz; I average 4 samples manually whilst reading them to get equivalent ODR of 26 Hz with less aliasing.

This is better than before (when there was no low-pass and at 52 Hz ODR), but there's still some noise (around 0.1g peak-to-peak - measured on a vibrating platform that vibrates at ~65 Hz) present in the resulting averaged samples. I verified that increasing the accelerometer ODR to 208 Hz decreases noise (aliasing) further. 416Hz reduces it even further (0.025g p-p). But that needs more I²C traffic and CPU time, so increasing the ODR will be prohibitive.

My question is: is it possible to set up the LSM6DS33 to sample the accelerometer at 833 Hz, average each 8 samples, and put the results in the FIFO (equivalent 104 ODR)? Or put in other way, to get an equivalent low-pass filtering BW lower than 50 Hz, ideally around 12 Hz?

For reference, my current config is:

CTRL1_XL = 0x4F; // acc setup -> 104 Hz, 8 g full scale, 50Hz bandwidth

CTRL2_G = 0x4C; // gyro setup -> 104 Hz, 2000 dps full scale

CTRL3_C = 0x44; // set BDU (block data update) bit high

CTRL4_C = 0x81; // enable FIFO length limit; XL_BW_SCAL_ODR=1

... (and also some unrelated code for setting up the FIFO).

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  • \$\begingroup\$ What does the data sheet tell you? \$\endgroup\$ – Andy aka Mar 9 '18 at 9:42
  • \$\begingroup\$ Average 8 samples at ODR 104 Hz then? I don't see any facility in the LSM to do averaging or accumulating any samples. \$\endgroup\$ – Arsenal Mar 9 '18 at 9:55
  • \$\begingroup\$ @Andyaka, the datasheet mentions data can be decimated, but I don't know how's that defined, it can be "take each n-th sample" or "average n samples", and the datasheet is sparse on that. The bigger problem is that the datasheet says "It’s required to set at least one of the three decimation factors to 1 (no decimation).", which means if I set 833 ODR, at least one channel MUST be at 833 ODR, which is too much I²C traffic for me. \$\endgroup\$ – anrieff Mar 9 '18 at 10:06
  • \$\begingroup\$ @Arsenal, I want to do digital low-pass filtering by averaging a lot of incoming samples, e.g. the accelerometer is at 833 Hz ODR, average every 8 incoming readings to get 104 samples/s equivalent. Or average 32 incoming readings to get 26 samples/s, very well filtered. \$\endgroup\$ – anrieff Mar 9 '18 at 10:09
  • \$\begingroup\$ @Arsenal, I slightly misunderstood your comment. I'm averaging 4 samples at 104 Hz already, but the remaining noise is too much. 8 samples at 104 Hz will give insufficient output data rate. \$\endgroup\$ – anrieff Mar 9 '18 at 10:40
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As confirmed by STM staff, the functionality I was requesting is not possible with this chip.

For reference, I'm considering the ICM-20602 which sports both lower filtering cutoff options, and the possibility to do on-chip averaging.

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