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I am new to this information portal!

However, I have question regarding open drain.

I read that, in open drain mode, neither of the devices (slave/master) are allowed to drive the data line HIGH, they can only drive the line low, otherwise there can be cases where it may damage the controller as it may lead to shorting of the circuit. So in order to do this, when Master has to read the data being transmitted from slave, it changes the mode to HiZ mode and changes the direction to input.

But my query is let's say master has to transmit the data (say data is 0xA5A5) on the data line which is being shared by the slave also. In such case will it cause any problem if mode is being already in HiZ, port direction as output for transmitting data 0xA5A5.? (i.e while transmitting 0xA5A5 master drives the line high also while being in the HiZ mode). So that when Master has to read the data, then it has do no mode change nor direction change as it's already being in HiZ mode, so that slave can drive the line low.

schematic

simulate this circuit – Schematic created using CircuitLab

Thanks

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    \$\begingroup\$ Welcome to the site. I'm afraid your post is just a 'sea of words', making it very hard to understand your situation and question. Please edit your question to split your text into paragraphs (with a blank line between them) that each cover a distinct point. Make your question clear. Please add a circuit diagram. Otherwise, you're asking people to piece together your circuit in their head from all this text. The schematic editor here is a breeze to use. The better the quality of your question, the better the quality of the answers it will attract. Again, a warm welcome to the site. \$\endgroup\$ – TonyM Mar 10 '18 at 7:43
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    \$\begingroup\$ @TonyM: Thank you for the feedback. I have edited this. \$\endgroup\$ – user180742 Mar 10 '18 at 8:02
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When a chip drives a line, it forces the line to have a specific voltage by making a direct connection between the output pin and that voltage (in your case, either 5 V or ground).

When a pin is in HiZ mode, the pin is not connected to any voltage, and the line's voltage is determined by some other chip driving the line, or by the pull-up resistor.

The schematic below shows how the chip might actually be implemented. When the switch is closed, the chip drives the line low, and when the switch is open, the pin is in HiZ mode. (In reality, the switch is a transistor.)

schematic

simulate this circuit – Schematic created using CircuitLab

So it is not possible to output anything in HiZ mode; in HiZ mode, the chip does not (and cannot) affect the line's voltage.

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  • \$\begingroup\$ Thank you so much for the reply. Just for the clarification, may be a very silly one, If I write 1 in the port data, does it means SW1 is closed and and If Write 0 in the data, does it means SW1 is open? \$\endgroup\$ – user180742 Mar 10 '18 at 10:44
  • \$\begingroup\$ Also I was trying to transmit 0xA5A5 on the data line and I was able to see it whenever SCK (clock) was there. Binary for 0xA5A5 is: 1010010110100101b. Since this data has '0''s also, won't it drive it low in HiZ mode? i.e In HiZ mode, When it tried to transmit '1', it was pulled up to 5V due to pull up resistor, and when it tried to transmit '0' it was connected to ground. In any case, at SCK (clockline), I will be able to see the data (0xA5A5) . So how its different from when it is not in HiZ mode? \$\endgroup\$ – user180742 Mar 10 '18 at 10:47
  • \$\begingroup\$ 0 = low. A chip with a push/pull output has a second switch to 5V; if such a pin has a HiZ mode, that is a third state in which both switches are open. \$\endgroup\$ – CL. Mar 10 '18 at 12:50
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You are essentially correct in the understanding that bidirectional Open Drain signaling works by having the devices at each end actively drive only in the low direction, and relies on something such as a pull-up resistor to establish a high default state otherwise.

Your question appears to be about what would happen if a master device "cheats" and drives the line in both directions during a time when the protocol says the master device should be transmitting: this may work, or it may cause bus collisions.

Many open drain schemes such a I2C make fundamental use of the way in which the electrical connection permits either party to hold the line low. For example, when an I2C master is talking, a slave may hold the clock line low to force delay; the master is supposed to see this, and wait for the slave to release the clock. Your hypothetical bi-directional driver would not be able to see this behavior of the slave, and would instead try to yank the line high while the slave is trying to hold it low, resulting in an electrical contention on the bus and most likely a failure of the transfer.

There is however, a related technique which can work. Some MCU GPIO pins cannot be configured for open-drain operation. So an alternate trick is to configure their data register bit to a "low" and signal by manipulating the direction control rather than the value: to signal an open-drain low the pin is made an output (driving low) and to signal a high it is made an input. This does work, and it also permits monitoring the state of the bus while it is released to high, to see if any other party is holding it low.

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  • \$\begingroup\$ In my case, it is sure that bus contention wont happen and when Master is transmitting, slave won't do any activity on the data bus and vice versa. <br/>But let's say when master tries to transmit on data line (data: 0xA5A5) in open drain mode, a high on the data line will still appear not because chip is actually driving it high but because of pull up device, and data (0xA5A5) is being received by slave. Is this type of transmission on data bus actually a correct one in open drain concept? Because in any case data is being received by slave though the way might be different! \$\endgroup\$ – user180742 Mar 11 '18 at 5:01
  • \$\begingroup\$ That's not a question. Things that are "take turns" protocols exist, but they aren't "open drain". As described above there may be specific circumstances where you can get away with cheating a standard - and others where you can't. \$\endgroup\$ – Chris Stratton Mar 11 '18 at 5:41

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