0
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I am trying to control an AD5206 digital potentiometer on a PocketBeagle (smaller Beaglebone Black essentially). I have an entry in my device tree for spidev, and I know the SPI pins are working because I can talk to a different chip on the bus (an MCP3208). I probed the CS line of the pot to make sure it was being selected during the write, which it was. However, I am measuring random resistances at the output of the pot (when measuring the resistance between DP0_B and AVCC).

Here is the relevant part of the schematic:

enter image description here

And the relevant code controlling it (this function gets called every two seconds in my main file):

int DigitalPotentiometer::setResistance(unsigned int channel, 
                                            unsigned int resistance) {

    // Create the 11-bit word
    unsigned int data[] = {channel, resistance};

    // Send the data over the SPI interface
    struct spi_ioc_transfer tr = {
        tx_buf        : (unsigned long)data,
        rx_buf        : (unsigned long)NULL,
        len           : 2,
        speed_hz      : 10000,
        delay_usecs   : 0,
        bits_per_word : 0
    };

    int retval = ioctl(this->_fd, SPI_IOC_MESSAGE(1), &tr);

    // Expected wiper settling time is 2us for the 10K variant, wait some extra
    usleep(5);

    return retval;
}

And the device tree file:

/dts-v1/;
/plugin/;

/ {
    compatible = "ti,am335x-pocketbeagle";
    part-number = "mm-cape";
    version = "00A0";

    fragment@0 {
        target = <&ocp>;
        __overlay__ {
            P1_08_pinmux { status = "disabled"; }; /* SCLK - spi0_sclk - P1_08 */
            P1_10_pinmux { status = "disabled"; }; /* MISO - spi0_d0   - P1_10 */
            P1_12_pinmux { status = "disabled"; }; /* MOSI - spi0_d1   - P1_12 */
            P1_35_pinmux { status = "disabled"; }; /* CS0  - lcd_pclk  - P1_35 */
            P2_02_pinmux { status = "disabled"; }; /* CS1 - gpmc_a11   - P2_02 */
            P1_06_pinmux { status = "disabled"; }; /* CS2 - spi0_cs0   - P1_06 */
            P2_19_pinmux { status = "disabled"; }; /* CS3 - gpmc_ad11  - P2_19 */
            P2_07_pinmux { status = "disabled"; }; /* CS4 - gpmc_wpn   - P2_07 */
        };
    };

    fragment@1 {
        target = <&ocp>;
        __overlay__ {
            cape-universal { status = "disabled"; };
        };
    };

    fragment@2 {
        target = <&ocp>;
        __overlay__ {
            cape-universal@1 {
                compatible = "gpio-of-helper";
                status = "okay";
                pinctrl-names = "default";
                pinctrl-0 = <>;
            };
        };
    };

    fragment@3 {
        target = <&am33xx_pinmux>;
        __overlay__ {
            spi0_pins: spi0_pins {
                pinctrl-single,pins = <
                    0x150 0x30 /* SCLK - spi0_sclk (MODE0 | INPUT  | PULLUP) */
                    0x154 0x30 /* MISO - spi0_d0   (MODE0 | INPUT  | PULLUP) */
                    0x158 0x10 /* MOSI - spi0_d1   (MODE0 | OUTPUT | PULLUP) */
                    0x0e8 0x17 /* CS0 - lcd_pclk   (MODE7 | OUTPUT | PULLUP) */
                    0x06c 0x17 /* CS1 - gpmc_a11   (MODE7 | OUTPUT | PULLUP) */
                    0x15c 0x17 /* CS2 - spi0_cs0   (MODE7 | OUTPUT | PULLUP) */
                    0x02c 0x17 /* CS3 - gpmc_ad11  (MODE7 | OUTPUT | PULLUP) */
                    0x074 0x17 /* CS4 - gpmc_wpn   (MODE7 | OUTPUT | PULLUP) */
                >;
            };
        };
    };

    fragment@4 {
        target = <&spi0>;
        __overlay__ {
            #address-cells = <1>;
            #size-cells = <0>;
            status = "okay";
            pinctrl-names = "default";
            pinctrl-0 = <&spi0_pins>;
            cs-gpios = <&gpio2 24 0>, 
                        <&gpio1 27 0>, 
                        <&gpio0 5 0>, 
                        <&gpio0 27 0>, 
                        <&gpio0 31 0>;

            channel@0 {
                status = "disabled";
            };

            channel@1 {
                status = "disabled";
            };

            adc0: mcp320x@0 {
                compatible = "microchip,mcp3208";
                reg = <0>;
                spi-max-frequency = <1000000>;
            };

            adc1: mcp320x@1 {
                compatible = "microchip,mcp3208";
                reg = <1>;
                spi-max-frequency = <1000000>;
            };

            pot0: spidev@2 {
                compatible = "spidev";
                reg = <2>;
                spi-max-frequency = <1000000>;
            };

            pot1: spidev@3 {
                compatible = "spidev";
                reg = <3>;
                spi-max-frequency = <1000000>;
            };

            pot2: spidev@4 {
                compatible = "spidev";
                reg = <4>;
                spi-max-frequency = <1000000>;
            };
        };
    };
};
\$\endgroup\$
  • \$\begingroup\$ Are you sure that it is sending an 11 bit data word and that that byte and bit order are correct? The other thing that looks strange is the 10000 Hz speed in the ioctl. \$\endgroup\$ – crj11 Mar 10 '18 at 21:08
  • \$\begingroup\$ It is configured to send the 11 bits as two 8-bit transfers back-to-back, right-aligned (so padded with leading zeroes). The bit order is correct, but for sanity I have also tried swapping it with no success. \$\endgroup\$ – Billy Kalfus Mar 10 '18 at 21:10
  • \$\begingroup\$ The timing diagram on page 5 of the linked datasheet has only 11 clocks. Are you sending 16? I'm not sure that will work. \$\endgroup\$ – crj11 Mar 10 '18 at 21:12
  • \$\begingroup\$ I am sending 16, but the internal function is specified to be a shift register with the last 11 bits clocked in being those that get latched. Other implementations on other platforms indicate that two 8-bit transfers should work. \$\endgroup\$ – Billy Kalfus Mar 10 '18 at 21:14
  • \$\begingroup\$ So you are sending a byte with the three LSBs as the address followed by the data? \$\endgroup\$ – crj11 Mar 10 '18 at 21:18

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