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I'm just really confused at the moment with biasing all these different MOSFET amplifier arrangements. Here is one,

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This is a common-gate amplifier and I am told that it is biased by a constant current source. And that's what I don't understand. How is that current source biasing the MOSFET? Shouldn't the current that is passing through \$R_D\$ be setting the MOSFET in saturation?If so, what is the point of that current source?

Secondly, maybe I am misunderstanding what biasing truly is. I always thought that the biasing arrangement is the circumstances around a transistor that pushes into one region or another.

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Biasing means you set up the operation point. Any amplifiers has different input and output impedances, gains, parasitics, etc.

For a MOS transistor biasing means you set the gate-source voltage or the drain source current, since the device is a voltage controlled (VGS) current source (IDS). The two are strongly related by the MOS equations.

Assume that the source voltage is higher or equal than the gate. In this case the devices is closed. The current source draws charges from the source node, and since there is no source of charges, the voltage on that node will sink. This increases the VGS of the transistor as long as the current through the transistor and the current source will not be the same. This way the VGS, IDS is set and all small signal parameters are set. (But even if your amplifier works in large signal biasing - setting the operation point - is important)

RD just sets the voltage gain (gm*RD). i(t)*RD should be small enough to keep the transistor in saturation, if you want a linear amplifier. RD has nothing to do with biasing.

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  • \$\begingroup\$ Ah! I see. So we can either set a constant V_GS or V_G(if source is grounded) to bias the MOSFET or we can put a current source on either the drain or the source since in saturation both drain current and source current is the same. \$\endgroup\$ Mar 14 '18 at 19:31
  • \$\begingroup\$ One more thing, I thought in an NMOS the current flows from drain to source and so shouldn't RD/VDD contribute to drain current? \$\endgroup\$ Mar 14 '18 at 19:33
  • \$\begingroup\$ The RD has no role in biasing. The gate and the source are the controlling terminals, the drain is kind of buffered. It has little effect (in ideal case no effect). The MOS is ideally a voltage controlled current source. In this case you can use a current, because it works on the source terminal, while the gate terminal is fixed. Putting a current source to the drain would be ineffective. If you find the answer useful, please vote it up, and if this solves your problem, mark it as "solution". Thanks! \$\endgroup\$ Mar 15 '18 at 8:11

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