How do non-flowing common mode or bias currents cause common mode range to exceed/float?

Question

Below is a very simplistic view of differential ended inputs of a data-acquisition channel's inAmp which measures a floating battery voltage V. To make concepts and explanations simpler I use two resistors to mimic the inAmp:

Above R resistances represents the input impedance of the inAmp, and z are representing the line impedances.

Before asking my questions here are my understanding so far:

Differential current id is very small due to the input impedance of the inAmp:

id = V/(2*R+2*z)

Since a diff amplifier will subtract the voltages between the nodes a and b with respect to its own AGND, we can say the voltage across a and b causes by id is:

Va = id*R

Vb = -id*R

Va - Vb = id*(2R)

But due to the common mode currents ic1 and ic2, additional voltages( call it Vad and Vbd) are also created at node a and b as:

Vad = icm1*R

Vbd = icm2*R

Vad - Vbd = (icm1-icm2)*R

The last equation tells us that unbalance in the system(for example if z are not equal) will not reject the common mode voltages entirely.

If my view on the subject correct here is my question:

Another thing I can say is that if icm1 and icm2 large enough so Vad and Vbd becomes large which can exceed the rails of the inAmp. This can cause saturation and erratic readings.

As a remedy a 10k to 100k resistor is suggested to tie between the negative node b to AGND. I guess this is to lower the common mode voltages causes by icm1 and icm2.

But how come a 10k resistor tied between the node b and the AGND solve this issue? How is icm2 reduced by using the resistor? How about icm1? Is it possible to explain this using my circuit example not involving a real inAmp? Could you explain this in a simplistic way possible?

Edit:

I see that there is peculiarity. icm1 and icm2 has no return path, since the source is floating. But why is not having a return path creates big voltages at the inAmp side? If there is no return path for icm1 and icm2 then how does it create a problematic voltage at node a and node b?

Most importantly how does icm1 and icm2 exist at all if there is no return path for these currents to loop?

Btw I'm not sure if my analogy makes sense for id as input currents. Because input bias currents do not loop back to source the way I oriented right?

^{simulate this circuit – Schematic created using CircuitLab}

Why sometimes the circuit in Figure 1 saturates and how does Rbias in Figure 2 fixes this problem? They say Rbias provides a return path to bias currents but why does the absence of return path causes inAmp to go saturate?

Why non flowing input bias currents saturates the inAmp or diff amp?

Answer 1

1. But how come a 10k resistor tied between the node b and the AGND solve this issue?

Schematics are much better than words. Draw it out.

2. icm1 and icm2 has no return path, since the source is floating.

Correct. So there is no common mode current.

3. Most importantly how does icm1 and icm2 exist at all if there is no return path for these currents to loop?

It doesn't.

4. If there is no return path for icm1 and icm2 then how does it create a problematic voltage at node a and node b?

Because if Z << R then \$ V_{ab} = V_{BAT} \$.

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^{simulate this circuit – Schematic created using CircuitLab}

Figure 1. Instrumentation amplifier showing bias currents.

With no return path to the power supply the inputs will be driven to one supply rail (positive with the bias current direction shown) or the other. You can consider these as constant current generators - a bit like your lab bench supply on constant current mode. If there is no significant load the voltage will rise (or fall) to the limit of the power supply.

Given that you have a voltage source between the two inputs it is likely that if the amp is sourcing current that the + input will rise to V+ and the - input will be held at \$ V_{batt} \$ below that.

^{simulate this circuit}

Figure 2. A constant current power supply feeding a load, \$ R_L \$.

How it works:

• R1 biases Q3 on. Current flows through R2, Q3 and RL.
• When the current through R2 rises to about 10 mA there will be enough voltage drop to turn on Q4. This will steal the bias from Q3 and the circuit will settle with 10 mA through RL. The voltage at NODE1 will be 10m x RL.

Now what happens to the voltage at NODE1 if you disconnect RL? The current through R2 will decrease, Q4 will shut off, Q3 will turn hard on and NODE1 will rise to V+.

This is a very crude explanation and I have no idea what the input stage of your amplifier looks like. It might help.