# voltage divider circuit design [duplicate]

I am giving -8 to +8 V supply to the op-amp. So, output of the op-amp is varying from (-8 to +8) V. I want to give this to ADS1115 ADC module. But the ADC module's max. Vin is 5.5 V.

I decided to use voltage divider. What I need is one voltage divider circuit which gives the output that ranges from 0-5 V, when we give the -8 to +8 V as Vin.

Problem here is negative voltage of -8 V. How can I over come this problem ?

• How is -8v a problem? – Norm Mar 20 '18 at 12:46
• You'll need to provide a DC offset for the opamp output at say, mid-ADC-Vcc. Can you provide the opamp circuit? – TisteAndii Mar 20 '18 at 12:47
• I don't think this is a duplicate. The linked question is about a level shifting circuit that didn't work (why does my 741 based circuit not work well?) This one is asking how to design a circuit. – JRE Mar 20 '18 at 20:08
• The listed link as @JRE states is not a duplicate. But Negative Voltage Level Shifting to an ADC is. – StainlessSteelRat Mar 20 '18 at 21:24

With a divider that has R1 = R3 and R1 = 1.2 * R2, you will scale the 8V to -8V range to 0 to 5V, as shown in the plot below.

At Vin = 8V you have a voltage divider with R1 || R3 and R2. At Vin = -8V, if R1 = R3, you have Vout = 0V. Doing the math from these two cases gets you R1 = 1.2 * R2.

Depending on your configuration, it is possible to connect the ground of your ADC to the negative rail of the opamp. -8V to +8V is just another way of saying 0V to +16V.

Then you need to scale the opamp voltage from 0-16V to 0-5V.

simulate this circuit – Schematic created using CircuitLab

When the input is 16V you want the output to be 5v. Therefore:

$$\frac{16*R2}{R1+R2} = 5$$

Lets make R2 1kΩ. Then:

$$\frac{16*1000}{R1 + 1000} = 5$$

Some rearrangement:

$$R1 = \frac{16*1000 - 5 *1000}{5} = 2.2KΩ$$

• For CircuitLab schematics with only a few components add an 's', 'm' or 'l' (small, medium, large) before the image '.png' and it will resize to a more reasonable looking size. This works for regular images too. – Transistor Mar 20 '18 at 12:57
• @Transistor Except it breaks the circuitlab connection. – pipe Mar 20 '18 at 13:13
• @MeenieLeis Seems I did misread the question before posting my answer lol. Thanks for pointing it out. I won't bother re-answering, this is a good answer here! – MCG Mar 20 '18 at 15:06
• @pipe: I hadn't spotted that it broke the CircuitLab connection. I don't use the trick for my own schematics but put a small 't' over on the right to force it to scale. Trevor_G puts a box around his. Ho-hum. Thanks for pointing it out. – Transistor Mar 20 '18 at 15:22
• That is fine as long as only one end of your system connects to the outside world. Once both ends of your system connect to the outside world having different ground levels on them becomes rather risky. – Peter Green Mar 20 '18 at 17:32

You really need to do two things.

1. Attenuate your +-8V signal to +-2.5V AND
2. Offset the signal to a bias point of 2.5V.

The circuit below will do that for you.

simulate this circuit – Schematic created using CircuitLab

OA2 buffers the half rail voltage generated by divider R1, and R2, with C1 to provide some filtering of any rail noise.

OA3 buffers the input signal after it is divided down from +-8V to +-2.5V by divider R3 and R4.

OA1 is a summing amplifier that adds the half rail offset from OA2 to the attenuated input signal from OA3 and produces the 0 to 5V signal you require.

R9, D1 and D2, provide a little extra protection from events where OA1 outputs over 5V or negative voltages, especially during power up.

Simpler implementations are likely available that combine functionality, but I personally prefer to keep my linear functions distinct for debugging purposes.

Use of 1% or better resistors is warranted in circuits like this.

NOTE: ADCs normally work better when you use the internal reference rather than measuring as a proportion of the supply rail which can wander or be noisy. As such, feeding the reference voltage from the ADC to the top of R1 instead of Vcc, and changing the divider, R3 and R4, appropriately may provide better results.

• Hi. Why we use OA3 buffer and that sin source ? What can go wrong if we directly input the voltage to summing amp via R3 and R4 voltage divider ? – Meenie Leis Mar 20 '18 at 17:15
• @MeenieLeis although some combination of resistors may allow you to do that with minimal error the issue is the summing input needs a low impedance source. Without the buffer the divider gets changed by the summing resistors. – Trevor_G Mar 20 '18 at 19:38
• What about the use of V1 sine 1kHz ? – Meenie Leis Mar 20 '18 at 19:59
• @MeenieLeis ignore the sine.. it's just showing a sample +-8V input signal and allows simulation testing. – Trevor_G Mar 20 '18 at 20:01
• Yeah :-D got it...... – Meenie Leis Mar 20 '18 at 20:02