You really need to do two things.
- Attenuate your +-8V signal to +-2.5V AND
- Offset the signal to a bias point of 2.5V.
The circuit below will do that for you.
simulate this circuit – Schematic created using CircuitLab
OA2 buffers the half rail voltage generated by divider R1, and R2, with C1 to provide some filtering of any rail noise.
OA3 buffers the input signal after it is divided down from +-8V to +-2.5V by divider R3 and R4.
OA1 is a summing amplifier that adds the half rail offset from OA2 to the attenuated input signal from OA3 and produces the 0 to 5V signal you require.
R9, D1 and D2, provide a little extra protection from events where OA1 outputs over 5V or negative voltages, especially during power up.
Simpler implementations are likely available that combine functionality, but I personally prefer to keep my linear functions distinct for debugging purposes.
Use of 1% or better resistors is warranted in circuits like this.
NOTE: ADCs normally work better when you use the internal reference rather than measuring as a proportion of the supply rail which can wander or be noisy. As such, feeding the reference voltage from the ADC to the top of R1 instead of Vcc, and changing the divider, R3 and R4, appropriately may provide better results.