I like to implement a simple module without using any DSPs on the FPGA. In other words, I like the whole design to be implemented using logic. Is there an option in Quartus Prime that allows me to disable mapping multipliers to DSPs?

If not, can you introduce a good implementation for a multiplier that I can use and fool Quartus Prime to implement it using logic?

  • \$\begingroup\$ Do you want a project-wide setting (i.e. disabling their use for the entire project), or a setting specific for the one module? \$\endgroup\$ – Tom Carpenter Mar 21 '18 at 22:23
  • \$\begingroup\$ @TomCarpenter This is actually a very simple project where the whole design is a single module with a few lines of Verilog code. Anyway, I'd really appreciate if you let me know how I can do it project-wide and/or module-wide. \$\endgroup\$ – Mahdi Mar 21 '18 at 22:29

There are two ways to achieve what you desire. One is a project setting, so will affect the entire design, which may or may not be desirable. The other way is module specific using attributes.

Project Wide

Open the project settings, and navigate to the "Compiler Settings" tab on the left. Click the button for "Advanced Settings (Synthesis)" to open the advanced settings window.

Find the option for "DSP Block Balancing", and select "Logic Elements".

This will completely disable the automatic inferring of DSP blocks, instead forcing all inferred multipliers to be implemented in logic.

Module Specific

The module specific alternative is to use the Verilog multstyle attribute to inform Quartus that you want to use logic based multipliers. To do this, add the following line directly above the module definition:

(* multstyle = "logic" *)

For example, you might have:

(* multstyle = "logic" *) module someMultipler ( ...

This will tell Quartus to use logic for any multiplier in this module.

You can do the same to request DSP blocks as well, using (* multstyle = "dsp" *)

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  • \$\begingroup\$ Thanks for answering my question. I tried module-specific and it works like a charm. The only thing is that I had to remove the backslash at the end of the line, so the directive looks like this: (* multstyle = "logic" *) \$\endgroup\$ – Mahdi Mar 21 '18 at 22:56

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