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I have no idea about how to draw crystal trace on pcb. I have stm32f0 chip and 4 MHz external crystal and 15 pF capacitor. Can you help me that how to get suitable trace for crystal trace? Should I use gnd trace around them?

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    \$\begingroup\$ You're treating 4 MHz as if it is RF. Well, it isn't! At 4 MHz things aren't that critical as long as the traces are less than a few cm long. I personally only start to worry about this above 20 MHz or so. \$\endgroup\$ – Bimpelrekkie Mar 22 '18 at 9:03
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    \$\begingroup\$ @Bimpelrekkie: 4MHz isn't RF?! My AM radio disagrees ;-) (But your point about things not being so critical on PCBs at that frequency is still valid!) \$\endgroup\$ – psmears Mar 22 '18 at 11:02
  • \$\begingroup\$ A good thing to know also is that high frequency board layout is dominated more by rise time rather than straight up frequency, and since a crystal's waveform is mostly sinusoidal, you have even more MHz-worth of room to play. \$\endgroup\$ – whatsisname Mar 22 '18 at 15:40
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I have designed a lot of boards and 4MHz is a very low frequency and worrying about trace width is not very important for this scenario. The most important thing is to get the crystal as close as is possible to the microcontroller chip. Even worrying about the ground layout, while generally important, is not very much of a deal at 4MHz. In the 80s when everyone was only using 1 or 2 layer PCBs they would be huge boards with thick traces. For example if you look inside a pinball game from the 1980s you'll find a CPU board which is almost 18" on a side and the components are all through hole and are placed inches apart from each other. These board were using frequencies up to around 8MHz or so with 6800 series processors and the traces were all laid out by hand by drawing on acetate. None of them even have ground planes. Even now, boards like the Arduino Uno are 2 layer for cost reasons. So yes to proper high frequency design, but don't worry too much. (However for breadboard or 2 layer designs make sure you have a lot of decoupling capacitors to help reduce supply bounce.)

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The important thing is to get the crystal close to the processor, and try to make both sides as symmetrical as possible. The trace width does not matter very much. A 5 mil (0.13 mm) or 8mil (0.20 mm) trace will be fine. But a 10 mil (0.25 mm) or even 12 mil (0.3 mm) will be possible.

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  • \$\begingroup\$ @Uwe, I think even the most economical boards can support 8 mil traces. \$\endgroup\$ – mkeith Mar 23 '18 at 4:20
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Google "crystal oscillator layout". Some guides:

  • ST has prepared such document AN2867 for your MCU
  • Microchip AVR186 (can be applied to other chips too)
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    \$\begingroup\$ "Google it" is a bad answer, and link-only answers are not great either. \$\endgroup\$ – pipe Mar 22 '18 at 7:32
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Agree, ST's note about crystal is worthy reading. And designing RF traces matched to particular impedance, say the 50, is quite long story. needles to say one must take Dk constant which is specific to substrate, various FR4s have different Dk, substrate thickness and transmission line model (track with ground, surrounding ground - so on). For crystals no one does this because there is no impedance match constraint and average crystal impedance at frequency of series resonance is about 10..15 +j0 ohms

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