How does the ARM Compiler (Version 5) handle double-precision floats in devices whose floating-point unit hardware only supports single precision?

Question

After reading ARM Compiler version 5's manual, it says that for devices without a floating point unit, floats are dealt with through software implementations, which is likely going to be slower than having a hardware unit.

However, I couldn't find any information on how the ARM Compiler 5 would deal with double precision floats on devices with single-precision FPUs. My assumption would be that it would also use a software implementation as if the FPU didn't exist, but in my code, I tried looking at the disassembly, and it appears that the FPU-specific instructions are being used!

For example,

   696:         spectral_line[2] = 6869.955;     /* B */ 
0x0800250A ED9F0B81  VLDR          d0,[pc,#0x204]
0x0800250E ED800B04  VSTR          d0,[r0,#0x10]

this above assembly code segment was generated by the ARM 5 compiler, even though spectral_line is an array of doubles!

How/what is the compiler doing here to handle the double-precision numbers?

Answer 1

and it appears that the FPU-specific instructions are being used!

That is indeed correct. You have both load and store instructions available on the single precisition FPUs, but none of the actual calculation instructions.

Note that this may make some software calculations using double slower, as function arguments will reside in the FPU but must be transferred back to CPU registers in order to actually use them.