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I have a circuit in place for the Linear Technology LT3502A switching regulator (datasheet here). To prevent blowing up the whole thing during hot-plugging, I have chosen to add a small parallel ceramic cap and series resistance instead of an unnecessarily large electrolytic. As so:

Schematic

The LT3502A is the 3V3 output version.

I shall be using 100V rated ceramics (1206 size) (or perhaps 50V is also okay, to meet the maximum input voltage of 40V for the chip).

I was just wondering what size resistor I should slap on there. I suppose I should be fine with an 0603 (0.125W)?

My logic being that the maximum output power of my chip at full load (which it will never reach) is 3.3V*0.5A = 1.65W. Multiply that by say, 2, to account for power losses and an additional safety multiplier (~ 3W). Presuming VBUS >= 12V (not going to put a 1W resistor there), the worst-case current through R7 is 250 mA, implying 0.0625W dissipation. An 0603 rated for 0.125W should be okay, I think? Just making sure not to release any magic smoke :)

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  • \$\begingroup\$ I'd look at direct connection for VIN, and have an RC network on the ~SHDN pin so that startup is delayed, but perhaps I misunderstand the problem you are trying to solve. \$\endgroup\$ Commented Mar 25, 2018 at 0:58
  • \$\begingroup\$ @Jasen the problem is a resonant circuit when hot-plugged, which can cause the input voltage across the ceramic cap to even double - destroying both the cap and the regulator. The solution is either an electrolytic, or this. \$\endgroup\$
    – Shreyas
    Commented Mar 25, 2018 at 9:46
  • \$\begingroup\$ @Shreyas have you considered a TVS diode? Depending on the headroom between your maximum vbus voltage and 40V a TVS diode can protect the regulator without a series resistor. \$\endgroup\$
    – Arcatus
    Commented Apr 4, 2021 at 18:58
  • \$\begingroup\$ Safest and most elegant way is to use an inrush current limiting circuit with a P-FET. \$\endgroup\$ Commented Apr 18, 2022 at 7:21

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The resistance has to be enough to critically damp the system. so the optimum answer depends on the length, impedance, and quality factor of the transmission line between the voltage source(s) and the capacitor.

A larger ceramic capacitor may be able to swallow all the excess energy available from the supply without an excessive voltage excursion.

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First of all it should be a flame-proof resistor. Based on a maximum 250 mA load 1 ohm would be 250 mV * 250 mA = .0625 watts, so 2 ohms is 125mW.

Usually one would try for 4.7 ohms or 10 ohms, but that would be a through-hole resistor, so it looks like 2 ohms is your limit for a 0603 size resistor.

You can stack resistors, such as two 4.7 ohms stacked, but that is your finite limit.

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I have just had this issue with a LDO with absolute maximum rating of 6V input using a 5V wall adapter.

First off I would make sure that you even have an issue. Will you ever get close to 40 volt on VBUS in any circumstance? Do a measurement and a simulation.

One way to critically damp a system is to have a shunt resistor instead, so you do not burn >1W in that resistor through your entire system lifetime. The shunt resistor will need a big capacitor in series so that it doesn't drain DC power.

R_shunt=1/2*sqrt(L_wire/C_input).

In the attached picture (green curve is left circuit, blue is the right circuit) i played with a simple model of a tantalum polymer capacitor, which had quite large series resistance (0.2 ohm) and the largest possible capacitance (47uF) in a 0805 package. If I had infinitely large capacitance in this simulation it would be perfectly damped.

enter image description here

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This gets tricky. You need to model the source impedance of whatever you plug that load into. Typically the limiting factor is parasitic inductances that get charged with the input capacitance inrush current. This stored energy is promptly released and can produce high voltages that can over stress the capacitors and the LDO.

Usually you’d want the capacitor directly on the LDO input to have the same or higher voltage rating as the LDO itself – so that the capacitor will be unlikely to fail if the LDO is still functional.

The capacitor on the bus side of things, in front of the isolating impedance, is a good idea to keep high frequency currents shunted away from the rest of the plug-in card.

It’s even better when that capacitor has an easier job: you’ll almost always want a dissipative ferrite bead in front of the capacitor. The bead acts like a resistor at high frequencies. But beware: the bead is also a “piece of wire” at lower frequencies and acts like an inductor there. So it’s a trade off: high frequency filtering for more series inductance. It’s then the job of the impedance between the two capacitors to neutralize the effects of this added series inductance.

Absent expensive modeling software, the best you can do is use moderately less expensive high bandwidth current probes and FET voltage probes to characterize the transients and observe how well you mitigate them. I often find it helpful to lay out a test board with the input circuit as well as wideband amplifiers that measure the input current and voltage transients. Those can be much cheaper than high-end probes, and can – with some care – outperform them, since you’re instrumenting the DUT in an optimal fashion, and not designing a general-purpose probe.

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