Tenting vias is great for:
- If a via is placed over some silk screen (designator, instruction, warning, etc.) and you want the text to be more readable
- A compact design with high component density and potential shorts nearby
- More aesthetic look (solder mask across the board, rather than gold/silver dots everywhere)
- Stop solder being sucked away during reflow if placed under a component/near a pad
On the contrary, though, I can't seem to find any reason not to tent vias. Assuming you have appropriate test points and the design works 100% (i.e. no need to probe around and check things), is there any reason not to tent every via on the board? Even if you do need to probe, you can still dig through the solder mask and make a connection if worse comes to worse anyway.
Only thing I can think of is increased heat retention if it is a high-current via, but besides that I'm lost.