0
\$\begingroup\$

I have created a circuit where I want to detect a pulse width , but unfortunately I can't get what I want. I think my circuit is totally wrong, I am looking online to find a solution, but the closest solution which I found was the Duty Cycle Adjusting Circuit for Clock Signals, which is not what I need.

I need a circuit that will output a voltage proportional to the pulse width of the input voltage. I want to get this output. enter image description here

enter image description here

But all I get is triangle wave generator.

EDIT:

So I have changed the circuit a little bit and I have got a result closer to the desired output. With the proposed solutions is a little bit hard to understand what I should do to achieve my desired output. enter image description here Here is the output that I get: enter image description here

I want v(net2) to start from 0 and be more linear after the pulse. I have also designed another circuit but there I get something completely wrong.

Here is alternative circuit: enter image description here

And the output of this circuit is: enter image description here Which is not even closer to the first solution. Help me to achieve the desired solution given in the first picture.

\$\endgroup\$
  • \$\begingroup\$ Is C1 supposed to be 0.1F? Try changing it to 0.1uF. \$\endgroup\$ – Steve G Mar 26 '18 at 13:53
  • \$\begingroup\$ No. I just decided to make it smaller and see what happens. I was using 0.1pF. \$\endgroup\$ – Vahram Voskerchyan Mar 26 '18 at 13:55
  • \$\begingroup\$ It's call a Tachometer circuit. ( a one shot at any f[Hz] up to 1/T [s] with a LPF ) \$\endgroup\$ – Sunnyskyguy EE75 Mar 26 '18 at 13:58
  • \$\begingroup\$ PWM at a given f has a spectrum that if filtered causes latency on BW of the "signal" so this will have ripple according to filter rejection, otherwise use a digital TI counter DAC and higher LPF for less latency. This "problem" lacks specs on signal BW , PWM rate and ripple & latency spec. !! Not just a failure to make an average voltage. \$\endgroup\$ – Sunnyskyguy EE75 Mar 26 '18 at 14:07
  • \$\begingroup\$ @TonyStewart.EEsince'75 thank you very much for the comment. I need to do some research to understand your solution. Unfortunately, I don't have enough background. \$\endgroup\$ – Vahram Voskerchyan Mar 26 '18 at 14:09
2
\$\begingroup\$

All you'd do is charge a capacitor (C1) with the current pulse. I don't know why you'd need M3 and M4 for that, seeing that neither "adds" any external current sourcing, and I don't see why you'd need M5 or anything connected to that.

The full circuit you need is a single capacitor connected between ground and your pulse source.

\$\endgroup\$
  • \$\begingroup\$ Thank you! I have got something closer to my desired output. But the voltage at net6 is increasing and decreasing when the pulse is starting. I want it to go linear when the pulse is starting ,that way I will have a pulse-width detection. \$\endgroup\$ – Vahram Voskerchyan Mar 26 '18 at 13:59
  • \$\begingroup\$ Use a one shot and LPF to reduce the ripple. \$\endgroup\$ – Sunnyskyguy EE75 Mar 26 '18 at 14:00
  • \$\begingroup\$ then you have something that doesn't behave like the perfect pulse source you're showing, and/or something that doesn't behave like a perfect capacitor. \$\endgroup\$ – Marcus Müller Mar 26 '18 at 14:00
  • \$\begingroup\$ The very definition of capacitor is that the voltage over it is the integral of current over time. So maybe your pulse source is not a current source? In that case, make a voltage-controlled current source and attach that to the capacitor. \$\endgroup\$ – Marcus Müller Mar 26 '18 at 14:02
1
\$\begingroup\$

Simple PWM to DC voltage converter.

schematic

simulate this circuit – Schematic created using CircuitLab



Fast PWM to DC converter, T2>= 2 x T1

Bandwidth of DC + AC signal = 0.35/T2 for T2 rise time= 10 to 90% PWM Vmax

schematic

simulate this circuit

Although this is extreme PWM modulation example, PWM goes from 25%,50%,75%,100%,25% to illustrate PWM to DC method conversion.

It works for any 0 to 100% with PWM using edge detection, , needing Vref for cap current, with edge detector on rising edge to S&H fast then dump integrator fast , then integrate slow and repeat just using analog switches and small plastic caps or COG caps or non-memory caps.

You just need to know how to get pulse from dV/dt and integrate with extreme high and low resistance during pulse off,On time for fast attack and slow decay.

Other

Otherwise like any Tachometer that converts RPM to Vdc, using 1 shot average voltage circuit with no integration just a LPF. But RPM rate of change is slow unless RPM rate is very high.

Same holds true for PWM frequency and signal DC-bandwidth causing delay and ripple. Fourier spectrum instantly tells you specs you need for LPF breakpoint and slope you would need given a ripple and delay spec. (but I digress)

\$\endgroup\$
  • \$\begingroup\$ I am currently trying to understand your answer , but honestly I am not able to , because I don't posses enough background.. Can I make my desired output just using the nmos/pmos without making S & H. Isn't this solution making this circuit more complicating ? \$\endgroup\$ – Vahram Voskerchyan Mar 26 '18 at 15:44
  • 1
    \$\begingroup\$ Maybe It depends on the specs I defined which you need to understand. I define two ways, simple with just an RC LPF and lots of delay or fast with S&H. No other analog way. \$\endgroup\$ – Sunnyskyguy EE75 Mar 26 '18 at 16:09

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.