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I am trying to make a sheet entry to use ports to connect devices in different sheets as explained in this image:

enter image description here

But I am getting an error from Altium saying:

Sheet Entry RB[0...7]
Warning: Nets whit multiple names
Error: Nets whit possible connection problems

Of course, nets are not being connected on the PCB. It is my sheet entry:

enter image description here

As you can see there is a red line below RB[0...7]. I want to connect a bus between the two sheets. If I put a simple pin instead of a bus I get the same error so I suppose the problem is in the sheet entry and not on the other sheets. My project looks like:

enter image description here

Thank you for your help :)


EDIT:

Esquema PIC.SchDoc: enter image description here

Entrada Analizador Logico.SchDoc:

enter image description here

Settings: enter image description here

PCB enter image description here

I can't see any differences between your examples and my sheets


SOLUTION @Fake Name answer was ok, you have to name ports and net labels as RB[..] not RB[...] (2 points instead on three) and you have no put a Port in each bus AND a net label also whit the same name in order to connect them.

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  • \$\begingroup\$ Regarding your edit: The only difference I see between your example and Fake Name's example is that you use 3 dots for the bus' net label. Try using RB[0..7] instead of RB[0...7]. That's the way it's recommended in the Altium manuals too. \$\endgroup\$ – m.Alin Jul 25 '12 at 11:43
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    \$\begingroup\$ Ok, problem solved, I didn't put net label on each bus, you have to put Port AND Net Label in order to connect them. Also I have changed [...] to [..] as you recommend me thank you :) \$\endgroup\$ – Andres Jul 25 '12 at 11:52
  • \$\begingroup\$ @Andres - I mention the buses have to be named too. Look at the end of my answer: For what it's worth, I am fairly sure you have to both name the buses with net-labels on each child-sheet, and name the ports. \$\endgroup\$ – Connor Wolf Jul 26 '12 at 5:24
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Can you post your sub-sheets?

From looking at what you have posted, I think you may have a typo in the entry: RB[0..7]. You typically get the red line below the entry when it is not correctly tied to a port on the child-sheet.

Right-click on the sheet symbol, and select "Sheet Symbol Actions" -> "Synchronize Sheet Entries and Ports"

enter image description here enter image description here enter image description here


Anyways,

I created a simple, minimal test schematic to do what you are doing:

Top Sheet: enter image description here
Sheet 1:
enter image description here
Sheet 2:
enter image description here

Project Hierarchy:
enter image description here

And it properly connected the nets across the different schematics:

enter image description here


For what it's worth, I am fairly sure you have to both name the buses with net-labels on each child-sheet, and name the ports.
Also, the bus name and wire names have to have the same prefix:
For example, a set of wires HERP0 HERP1 HERP2 HERP3 HERP4 has to be in a bus named HERP[0..4]. It may also have to be zero-indexed (i.e. start at 0, rather then 1), but I'm not totally positive on that.

Also, I do indeed get the "Net NetName has multiple names" warning, but it's just that, a warning. You can turn the warning off, or just ignore it. I tend to leave it on, and before I have a board produces, go through all the warnings and make sure that I intend for whatever they refer to to be that way.

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  • \$\begingroup\$ Fake Name, I have edited my questions whit my sub-sheets. In "Synchronize Sheet Entries and Ports" options Altium says "All sheet symbols are matched" on the sheet entry where I have RB[0...7] and where I have A[0...7] port I have matched it but keep getting the same error. I saw one of my port in sheet entry was bi-directional and the other not, I changed both to bi-directional and the error dissapeared but they are not being connected on PCB. \$\endgroup\$ – Andres Jul 25 '12 at 11:40

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