Integrator which has a compensating resistor

Figure above is an integrator which has a compensating resistor

Hi there and I have a question about the compensating resistor, which is connected to the positive input in above circuits. I know the 'compensating resistor' to compensate input bias currents b/w two inputs in Op and that this is for making voltage drop to be zero. But I cannot understand the principle of this, and why the resistor should be same as the resistor which is in serial connection with V_in?


The assumption is that the bias currents flowing into or out of the inputs are similar to each other (usually a very good assumption with bipolar op-amps, in which the currents tend to be relatively high).

So suppose 5uA flows out of each input (typical range of input current for good amplifiers aimed at high-end audio applications).. and the resistor R1 is 10K, then there would be 50mV at the inverting input assuming the output is not changing. Putting 10K on the non-inverting input means it also will sit at 50mV above ground. If the offset voltage is zero and the input bias currents are the same, then the amplifier will be biased.

The particular circuit shown is an inverting integrator and adding the resistor does not make a whole lot of difference since the output voltage is dependent on the history of capacitor current and initial conditions. It can make a lot of difference if the circuit is an amplifier or if you short the capacitor to set the integrator initial condition (but then you don't want the resistor, for reasons that should be obvious if you think about it- or, more precisely, the resistor should match the switch 'on' resistance).

  • \$\begingroup\$ Actually, it assumes that the bias currents are of the same polarity, and considerably larger than the offset current (which used to be good assumption). It also assumes that offset current times effective resistance is comparable to or larger than the offset voltage. \$\endgroup\$ – WhatRoughBeast Mar 30 '18 at 21:28
  • \$\begingroup\$ I can't understand this answer. The non-inverting input is grounded through R_1, there is no current flowing in the non-inverting input since V_in is applied only to the inverting input. \$\endgroup\$ – KMC May 27 '20 at 23:35
  • \$\begingroup\$ @KMC in general there will be a current flowing into or out of each input, for any applied voltage within the operating range (and also outside that range, but that doesn't usually matter). If Vin = 0 and V+ = 0 (and assume Vos =0), then that current will have to be supplied through the capacitor so the output will drift up or down depending on the polarity of the bias current. \$\endgroup\$ – Spehro Pefhany May 27 '20 at 23:40
  • \$\begingroup\$ @SpehroPefhany do you mean when Vin = 0 and V+ = 0, there is an error current flowing out of Vout, through the C1 into the op amp circuitry eventually reaching out to V- to ground? It won't make sense since bipolar input has base current going into collector or emitter only in one direction. How could any small current leak out from the base unless the current is big enough to reverse bias out of the base input (V+)? \$\endgroup\$ – KMC May 27 '20 at 23:52
  • \$\begingroup\$ By V+ I mean the non-inverting input. For the op-amp to equalize the voltages at the two inputs the current must flow through the capacitor so if the current is into the input, the output will have to rise at a rate of ib/C volts per second. Eg. 10nF and 100nA would be 10 volts per second, so it will saturate in a second or two. In a bipolar op-amp the base current is the collector current divided by the input transistor beta. It flows in for NPN inputs and out for PNP. \$\endgroup\$ – Spehro Pefhany May 28 '20 at 0:28

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