I am using the AC701

I need to use the pins of the FMC connector to connect the outputs of 8 ADC to the inputs of the FPGA ( 41 pairs of LVDS signals)

I need to use the pins of the FMC connector to connect the inputs of a NI DAQ (acquisition card) to the outputs of the FPGA (single ended signals TTL/CMOS)

So my question is can i do that? In the sense that can i change in the UCF the IOSTANDARD file to match (LVDS_25 for my LDVS input signals and LVCMOS25 for my CMOS single ended outputs to the NI DAQ. Here is the one part of the UCF concerning the FMC:

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Here is an example of modification that i want to do:

set_property PACKAGE_PIN D18 [get_ports FMC1_HPC_LA00_CC_P]

set_property IOSTANDARD LVDS_25 [get_ports FMC1_HPC_LA00_CC_P]

set_property PACKAGE_PIN C18 [get_ports FMC1_HPC_LA00_CC_N]

set_property IOSTANDARD LVDS_25 [get_ports FMC1_HPC_LA00_CC_N]

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Yes, you can change between LVDS and LVCMOS on a artix7 IO. (On a FMC connector the fpga IO are directly connected.) Be carrefull with the voltage. A 2v5 io cannot be changed to 3v3! Its the number at the end that indicates it. Mind also Clock Capable pins if you want to input a clock in the fpga.

  • \$\begingroup\$ Thank you, And a last doubt that i have is that i have 9 LVDS clock signals , INCLK and 8 TXCLK that i want to input to my FPGA. The problem is that i see that there are only 4 pairs o clock capable pins: CLK0_M2C_P, CLK&_M2C_P, CLK2_M2C_P and CLK3_M2C_P Can i tie these 9 clock to HA or LA pins anyway? I have added a figure of the clk signals \$\endgroup\$ – the dude Apr 2 '18 at 15:58
  • \$\begingroup\$ Yes you can but: On clock capable pins there is a direct link to clock trees. Without that you cannot constraint the propagation time of the clock in the fpga. If you want to sample the data with that clock it won't work. \$\endgroup\$ – user184182 Apr 2 '18 at 16:11
  • \$\begingroup\$ Also, there may be more clock capable input. Check the fpga pinout. Look for CC pins. \$\endgroup\$ – user184182 Apr 2 '18 at 16:12
  • \$\begingroup\$ I don't really understand are you talking about the FMC pins or about the FPGA pins? Here is the pinout of the FPGA and the differential clock capable pins of the FMC are linked to I/O user pins on the FPGA (pins D19 C19 H21 and H22) i don't see on the FPGA any CC pins. \$\endgroup\$ – the dude Apr 2 '18 at 16:47

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