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I need to understand the data, DE, VSYNC, HSYNC and CLK inputs of ADV7511 video controller. I need them to program FPGA card (Xilinx Kintex KCU116) that has this video chip. FPGA manual says it uses ADV7511 to provide 1080P 60 Hz, YCbCr 4:2:2 encoding via 18-bit input data mapping.

The 18 bit data bus looks more or less clear, VSYNC and HSYNC most likely mark end of the frame and end of the row, and CLK is for the clock, hopefully one tick per pixel. Please correct me if these assumptions are wrong.

What is the DE signal for? Can I leave it maybe unconnected? I have looked into various documents on the product website, but seems that the signals are not properly described. The FPGA board manual does not explain much either.

There is another question about ADV7511 but it is different and looks way too broad to be answered.

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  • \$\begingroup\$ DE is an alternative to HSYNC+VSYNC. It depends on your display which of the two options you had to use. \$\endgroup\$ – Janka Mar 30 '18 at 22:05
  • \$\begingroup\$ A couple of words more please ... \$\endgroup\$ – h22 Mar 30 '18 at 22:13
  • \$\begingroup\$ Some displays go with DE, some with HSYNC+VSYNC. If you leave out DE on your HDMI transmitter, this is fine as long your receiver has a display that doesn't need DE. Many displays can go with either DE or HSYNC+VSYNC but if your transmitter has to be universal, you have to send DE. \$\endgroup\$ – Janka Mar 30 '18 at 22:16
  • \$\begingroup\$ If you see here analog.com/media/en/technical-documentation/application-notes/… you find at the end their HS is a pulse. The edge of HS marks the line start (or line end) while DE marks the active area. Without DE, the receiver need to count for the H blanking internally. \$\endgroup\$ – user3528438 Mar 30 '18 at 22:51

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